3.3V LVDS High Speed Differential Driver/Receiver

General Description This driver and receiver pair are designed for high speed interconnects utilizing Low Voltage Differential Signaling (LVDS) technology. The driver translates LVTTL signals to LVDS levels with a typical differential output swing of 350mV and the receiver translates LVDS signa

3.3V LVDS 高速差分驱动器/接收器

该驱动器和接收器对专为采用低压差分信号(LVDS)技术进行高速互连而设计。 驱动器将LVTTL信号转换为LVDS电平，采用典型的差分输出摆幅350mV，接收器将LVDS信号转换为LVTTL电平，采用典型的差分输入阙值100mV。 LVDS即使在高频下也可以超低功耗提供EMI低辐射。 该器件是时钟或数据高速传输的理想之选。 •数据速率大于400Mbs\n•3.3V电源操作\n•0.5ns最大差分脉冲偏斜\n•2.5ns最大传播延迟\n•低功耗\n•断电保护\n•100mV接收器输入敏感度\n•为开路、短路或中断情况提供故障安全保护\n•符合或超越TIA/EIA-644 LVDS标准\n•流通式引脚分配简化了PCB布局\n•14引脚SOIC和TSSOP封装可节省空间;

3.3V LVDS High Speed Differential Driver/Receiver

文件：1.53833 Mbytes Page：16 Pages

3.3V LVDS High Speed Differential Driver/Receiver

General Description This driver and receiver pair are designed for high speed interconnects utilizing Low Voltage Differential Signaling (LVDS) technology. The driver translates LVTTL signals to LVDS levels with a typical differential output swing of 350mV and the receiver translates LVDS signa

3.3V LVDS High Speed Differential Driver/Receiver

General Description This driver and receiver pair are designed for high speed interconnects utilizing Low Voltage Differential Signaling (LVDS) technology. The driver translates LVTTL signals to LVDS levels with a typical differential output swing of 350mV and the receiver translates LVDS signa

3.3V LVDS High Speed Differential Driver/Receiver

General Description This driver and receiver pair are designed for high speed interconnects utilizing Low Voltage Differential Signaling (LVDS) technology. The driver translates LVTTL signals to LVDS levels with a typical differential output swing of 350mV and the receiver translates LVDS signa

3.3V LVDS High Speed Differential Driver/Receiver

General Description This driver and receiver pair are designed for high speed interconnects utilizing Low Voltage Differential Signaling (LVDS) technology. The driver translates LVTTL signals to LVDS levels with a typical differential output swing of 350mV and the receiver translates LVDS signa

3.3V LVDS High Speed Differential Driver/Receiver

文件：1.53833 Mbytes Page：16 Pages

3.3V LVDS High Speed Differential Driver/Receiver

文件：1.53833 Mbytes Page：16 Pages

封装/外壳：14-TSSOP（0.173"，4.40mm 宽） 包装：管件 描述：IC TRANSCEIVER FULL 1/1 14TSSOP 集成电路（IC） 驱动器，接收器，收发器

封装/外壳：14-TSSOP（0.173"，4.40mm 宽） 包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 描述：IC TRANSCEIVER FULL 1/1 14TSSOP 集成电路（IC） 驱动器，接收器，收发器

Low-voltage frequency synthesizer for radio telephones

GENERAL DESCRIPTION The UMA1019AM BICMOS device integrates prescalers, a programmable divider, and phase comparator to implement a phase-locked loop. The device is designed to operate from 3 NiCd cells, in pocket phones, with low current and nominal 5 V supplies. FEATURES • Low current from 3 V

Low-voltage frequency synthesizer for radio telephones

GENERAL DESCRIPTION The UMA1019M BICMOS device integrates prescalers, a programmable divider, and phase comparator to implement a phase-locked loop. The device is designed to operate from 3 NiCd cells, in pocket phones, with low current and nominal 5 V supplies. FEATURES • Low current from 3 V

METAL GATE RF SILICON FET

文件：37.52 Kbytes Page：4 Pages

METAL GATE RF SILICON FET

文件：37.52 Kbytes Page：4 Pages

PATENTED GOLD METALIZED SILICON GATE ENHANCEMENT MODE RF POWER VDMOS TRANSISTOR

文件：38.1 Kbytes Page：2 Pages