功能：时钟发生器 包装：散装 描述：EVAL BOARD FOR 9FGL0841 开发板，套件，编程器 评估和演示板及套件

3.3V PCIe Gen1–5 Clock Generator Family

Features ▪ Integrated terminations for 100Ω and 85Ω systems save 4 resistors per output ▪ 112–206 mW typical power consumption (at 3.3V) ▪ VDDIO rail allows 35 power savings at optional 1.05V (9FGL06 and 9FGL08 only) ▪ Devices contain default configuration; SMBus not required ▪ SMBus-select

3.3V PCIe Gen1–5 Clock Generator Family

Features ▪ Integrated terminations for 100Ω and 85Ω systems save 4 resistors per output ▪ 112–206 mW typical power consumption (at 3.3V) ▪ VDDIO rail allows 35 power savings at optional 1.05V (9FGL06 and 9FGL08 only) ▪ Devices contain default configuration; SMBus not required ▪ SMBus-select

8-output 3.3V PCIe Clock Generator

文件：402.27 Kbytes Page：19 Pages

8-output 3.3V PCIe Clock Generator

文件：402.27 Kbytes Page：19 Pages