Evaluation Board for 12-bit high speed, low power, successive-approximation ADC

GENERAL DESCRIPTION The AD7492, AD7492-4, and AD7492-5 are 12-bit high speed, low power, successive approximation ADCs. The parts operate from a single 2.7 V to 5.25 V power supply and feature throughput rates up to 1.25 MSPS. They contain a low noise, wide bandwidth track/hold amplifier that can

1.25 MSPS, 16 mW Internal REF and CLK, 12-Bit Parallel ADC

文件：194.66 Kbytes Page：16 Pages

1.25 MSPS, 16 mW Internal REF and CLK, 12-Bit Parallel ADC

GENERAL DESCRIPTION The AD7492, AD7492-4, and AD7492-5 are 12-bit high speed, low power, successive approximation ADCs. The parts operate from a single 2.7 V to 5.25 V power supply and feature throughput rates up to 1.25 MSPS. They contain a low noise, wide bandwidth track/hold amplifier that can

1.25 MSPS, 16 mW Internal REF 12-Bit Parallel ADC

文件：374.07 Kbytes Page：25 Pages

包装：盒 描述：BOARD EVALUATION FOR AD7492 开发板，套件，编程器 评估板 - 模数转换器（ADC）

DIVIDE-BY-TWELVE COUNTER

DESCRIPTION- The ’92 is a 4-stage ripple counter containing a high speed flip-flop acting as a divide-by-two and three flip-flops connected as a divide-by-six. HIGH signals on the Master Reset (MR) inputs override the clocks and force all outputs to the LOW state.

SIPS Remote Transducer

Description The Type 7492 SIPS Remote Transducer is the general purpose transducer used in SIPS 1 and SIPS 2 systems. The unit is typically used where it may be difficult to mount a complete transceiver unit, either due to limited space or harsh operating environment. By using the remote transdu

DIVIDE-BY-TWELVE COUNTER

DESCRIPTION- The ’92 is a 4-stage ripple counter containing a high speed flip-flop acting as a divide-by-two and three flip-flops connected as a divide-by-six. HIGH signals on the Master Reset (MR) inputs override the clocks and force all outputs to the LOW state.

DIVIDE-BY-TWELVE COUNTER

文件：278.94 Kbytes Page：3 Pages

DIVIDE-BY-TWELVE COUNTER

文件：278.94 Kbytes Page：3 Pages