Low-Jitter LVPECL Fanout Clock Buffers with up to 10 LVPECL Outputs from Any-Format Input and Wide Frequency Range from DC up to 1250 MHz

KEY FEATURES • Ultra-low additive jitter: 50 fs rms • Built-in LDOs for high PSRR performance • Up to 10 LVPECL Outputs • Any-format Inputs (LVPECL, Low-power LVPECL, LVDS, CML, HCSL, LVCMOS) • Wide frequency range: dc to 1250 MHz • Output Enable option • Multiple configuration options •

Low-Jitter LVPECL Fanout Clock Buffers with up to 10 LVPECL Outputs from Any-Format Input and Wide Frequency Range from DC up to 1250 MHz

KEY FEATURES • Ultra-low additive jitter: 50 fs rms • Built-in LDOs for high PSRR performance • Up to 10 LVPECL Outputs • Any-format Inputs (LVPECL, Low-power LVPECL, LVDS, CML, HCSL, LVCMOS) • Wide frequency range: dc to 1250 MHz • Output Enable option • Multiple configuration options •

WIRE-TO BOARD HOUSING TERMINAL, 2.5mm, SIDE LOCK

文件：65.43 Kbytes Page：1 Pages

DUAL 1:5 LOW JITTER LVPECL CLOCK BUFFER

文件：1.6221 Mbytes Page：27 Pages

Output Enable option

文件：1.07335 Mbytes Page：51 Pages