EPM7064S价格
参考价格：￥68.9183
型号：EPM7064SLC44-10 品牌：Altera 备注：这里有EPM7064S多少钱，2026年最近7天走势，今日出价，今日竞价，EPM7064S批发/采购报价，EPM7064S行情走势销售排行榜，EPM7064S报价。| 型号 | 功能描述 | 生产厂家 企业 | LOGO | 操作 |
|---|---|---|---|---|
EPM7064S | Programmable Logic Device Family General Description The MAX 7000 family of high-density, high-performance PLDs is based on Altera’s second-generation MAX architecture. Fabricated with advanced CMOS technology, the EEPROM-based MAX 7000 family provides 600 to 5,000 usable gates, ISP, pin-to-pin delays as fast as 5 ns, and counte | ALTERA 阿尔特 |   | |
EPM7064S | Programmable Logic Device Family General Description The MAX 7000 family of high-density, high-performance PLDs is based on Altera’s second-generation MAX architecture. Fabricated with advanced CMOS technology, the EEPROM-based MAX 7000 family provides 600 to 5,000 usable gates, ISP, pin-to-pin delays as fast as 5 ns, and counte | ALTERA 阿尔特 | | |
EPM7064S | Programmable Logic Device Family General Description The MAX 7000 family of high-density, high-performance PLDs is based on Altera’s second-generation MAX architecture. Fabricated with advanced CMOS technology, the EEPROM-based MAX 7000 family provides 600 to 5,000 usable gates, ISP, pin-to-pin delays as fast as 5 ns, and counte | ALTERA 阿尔特 | | |
EPM7064S | Programmable Logic Device Family General Description The MAX 7000 family of high-density, high-performance PLDs is based on Altera’s second-generation MAX architecture. Fabricated with advanced CMOS technology, the EEPROM-based MAX 7000 family provides 600 to 5,000 usable gates, ISP, pin-to-pin delays as fast as 5 ns, and counte | ALTERA 阿尔特 | | |
EPM7064S | Programmable Logic Device Family General Description The MAX 7000 family of high-density, high-performance PLDs is based on Altera’s second-generation MAX architecture. Fabricated with advanced CMOS technology, the EEPROM-based MAX 7000 family provides 600 to 5,000 usable gates, ISP, pin-to-pin delays as fast as 5 ns, and counte | ALTERA 阿尔特 | | |
EPM7064S | Programmable Logic Device Family General Description The MAX 7000 family of high-density, high-performance PLDs is based on Altera’s second-generation MAX architecture. Fabricated with advanced CMOS technology, the EEPROM-based MAX 7000 family provides 600 to 5,000 usable gates, ISP, pin-to-pin delays as fast as 5 ns, and counte | ALTERA 阿尔特 | | |
EPM7064S | Programmable Logic Device Family General Description The MAX 7000 family of high-density, high-performance PLDs is based on Altera’s second-generation MAX architecture. Fabricated with advanced CMOS technology, the EEPROM-based MAX 7000 family provides 600 to 5,000 usable gates, ISP, pin-to-pin delays as fast as 5 ns, and counte | ALTERA 阿尔特 | | |
EPM7064S | Programmable Logic Device Family General Description The MAX 7000 family of high-density, high-performance PLDs is based on Altera’s second-generation MAX architecture. Fabricated with advanced CMOS technology, the EEPROM-based MAX 7000 family provides 600 to 5,000 usable gates, ISP, pin-to-pin delays as fast as 5 ns, and counte | ALTERA 阿尔特 | | |
EPM7064S | Programmable Logic Device Family General Description The MAX 7000 family of high-density, high-performance PLDs is based on Altera’s second-generation MAX architecture. Fabricated with advanced CMOS technology, the EEPROM-based MAX 7000 family provides 600 to 5,000 usable gates, ISP, pin-to-pin delays as fast as 5 ns, and counte | ALTERA 阿尔特 | | |
EPM7064S | Programmable Logic Device Family General Description The MAX 7000 family of high-density, high-performance PLDs is based on Altera’s second-generation MAX architecture. Fabricated with advanced CMOS technology, the EEPROM-based MAX 7000 family provides 600 to 5,000 usable gates, ISP, pin-to-pin delays as fast as 5 ns, and counte | ALTERA 阿尔特 | | |
EPM7064S | Programmable Logic Device Family General Description The MAX 7000 family of high-density, high-performance PLDs is based on Altera’s second-generation MAX architecture. Fabricated with advanced CMOS technology, the EEPROM-based MAX 7000 family provides 600 to 5,000 usable gates, ISP, pin-to-pin delays as fast as 5 ns, and counte | ALTERA 阿尔特 | | |
EPM7064S | Programmable Logic Device Family General Description The MAX 7000 family of high-density, high-performance PLDs is based on Altera’s second-generation MAX architecture. Fabricated with advanced CMOS technology, the EEPROM-based MAX 7000 family provides 600 to 5,000 usable gates, ISP, pin-to-pin delays as fast as 5 ns, and counte | ALTERA 阿尔特 | | |
EPM7064S | Programmable Logic Device Family General Description The MAX 7000 family of high-density, high-performance PLDs is based on Altera’s second-generation MAX architecture. Fabricated with advanced CMOS technology, the EEPROM-based MAX 7000 family provides 600 to 5,000 usable gates, ISP, pin-to-pin delays as fast as 5 ns, and counte | ALTERA 阿尔特 | | |
EPM7064S | Programmable Logic Device Family General Description The MAX 7000 family of high-density, high-performance PLDs is based on Altera’s second-generation MAX architecture. Fabricated with advanced CMOS technology, the EEPROM-based MAX 7000 family provides 600 to 5,000 usable gates, ISP, pin-to-pin delays as fast as 5 ns, and counte | ALTERA 阿尔特 | | |
EPM7064S | Programmable Logic Device Family Features ■ High-performance, EEPROM-based programmable logic devices (PLDs) based on second-generation MAX® architecture ■ 5.0-V in-system programmability (ISP) through the built-in IEEE Std. 1149.1 Joint Test Action Group (JTAG) interface available in MAX 7000S devices – ISP circuitry compa | ALTERA 阿尔特 | | |
EPM7064S | Programmable Logic Device Family | INTEL 英特尔 | | |
EPM7064S | Programmable Logic Device Family 文件：1.49779 Mbytes Page：66 Pages | ALTERA 阿尔特 | | |
Programmable Logic Device Family Description The MAX 7000 family of high-density, high-performance PLDs is based on Altera’s second-generation MAX architecture. Fabricated with advanced CMOS technology, the EEPROM-based MAX 7000 family provides 600 to 5,000 usable gates, ISP,pin-to-pin delays as fast as 5 ns, and counter speeds | ALTERA 阿尔特 | | ||
Programmable Logic Device Family General Description The MAX 7000 family of high-density, high-performance PLDs is based on Altera’s second-generation MAX architecture. Fabricated with advanced CMOS technology, the EEPROM-based MAX 7000 family provides 600 to 5,000 usable gates, ISP, pin-to-pin delays as fast as 5 ns, and counte | ALTERA 阿尔特 | | ||
Programmable Logic Device Family General Description The MAX 7000 family of high-density, high-performance PLDs is based on Altera’s second-generation MAX architecture. Fabricated with advanced CMOS technology, the EEPROM-based MAX 7000 family provides 600 to 5,000 usable gates, ISP, pin-to-pin delays as fast as 5 ns, and counte | ALTERA 阿尔特 | | ||
EPM7064SLC44-7N - 芯片, CPLD, MAX 7000, 64宏单元, PLCC44 The EPM7064SLC44-7N is an EEPROM Complex Programmable Logic Device with 1250 usable gates and 64 macro cells. MAX 3000A CPLD is a high-density, high-performance and fabricated with advanced CMOS technology, the EEPROM-based MAX 7000 family provides 600 to 5000 usable gates, ISP, pin-to-pin delays as ·PCI-compliant device\n·Open-drain output\n·Programmable security bit for protection of proprietary designs; | INTEL 英特尔 | | ||
Programmable Logic Device Family General Description The MAX 7000 family of high-density, high-performance PLDs is based on Altera’s second-generation MAX architecture. Fabricated with advanced CMOS technology, the EEPROM-based MAX 7000 family provides 600 to 5,000 usable gates, ISP, pin-to-pin delays as fast as 5 ns, and counte | ALTERA 阿尔特 | | ||
High-performance, EEPROM-based programmable logic devices PLDs) based on second-generation MAX architecture General Description The MAX 7000 family of high-density, high-performance PLDs is based on Altera’s second-generation MAX architecture. Fabricated with advanced CMOS technology, the EEPROM-based MAX 7000 family provides 600 to 5,000 usable gates, ISP, pin-to-pin delays as fast as 5 ns, and counte | ALTERA 阿尔特 | | ||
Programmable Logic Device Family General Description The MAX 7000 family of high-density, high-performance PLDs is based on Altera’s second-generation MAX architecture. Fabricated with advanced CMOS technology, the EEPROM-based MAX 7000 family provides 600 to 5,000 usable gates, ISP, pin-to-pin delays as fast as 5 ns, and counte | ALTERA 阿尔特 | | ||
Programmable Logic Device Family General Description The MAX 7000 family of high-density, high-performance PLDs is based on Altera’s second-generation MAX architecture. Fabricated with advanced CMOS technology, the EEPROM-based MAX 7000 family provides 600 to 5,000 usable gates, ISP, pin-to-pin delays as fast as 5 ns, and counte | ALTERA 阿尔特 | | ||
Programmable Logic Device Family General Description The MAX 7000 family of high-density, high-performance PLDs is based on Altera’s second-generation MAX architecture. Fabricated with advanced CMOS technology, the EEPROM-based MAX 7000 family provides 600 to 5,000 usable gates, ISP, pin-to-pin delays as fast as 5 ns, and counte | ALTERA 阿尔特 | | ||
Programmable Logic Device Family General Description The MAX 7000 family of high-density, high-performance PLDs is based on Altera’s second-generation MAX architecture. Fabricated with advanced CMOS technology, the EEPROM-based MAX 7000 family provides 600 to 5,000 usable gates, ISP, pin-to-pin delays as fast as 5 ns, and counte | ALTERA 阿尔特 | | ||
Programmable Logic Device Family General Description The MAX 7000 family of high-density, high-performance PLDs is based on Altera’s second-generation MAX architecture. Fabricated with advanced CMOS technology, the EEPROM-based MAX 7000 family provides 600 to 5,000 usable gates, ISP, pin-to-pin delays as fast as 5 ns, and counte | ALTERA 阿尔特 | | ||
Programmable Logic Device Family General Description The MAX 7000 family of high-density, high-performance PLDs is based on Altera’s second-generation MAX architecture. Fabricated with advanced CMOS technology, the EEPROM-based MAX 7000 family provides 600 to 5,000 usable gates, ISP, pin-to-pin delays as fast as 5 ns, and counte | ALTERA 阿尔特 | | ||
Programmable Logic Device Family General Description The MAX 7000 family of high-density, high-performance PLDs is based on Altera’s second-generation MAX architecture. Fabricated with advanced CMOS technology, the EEPROM-based MAX 7000 family provides 600 to 5,000 usable gates, ISP, pin-to-pin delays as fast as 5 ns, and counte | ALTERA 阿尔特 | | ||
封装/外壳：44-LCC（J 形引线） 包装：托盘 描述：IC CPLD 64MC 10NS 44PLCC 集成电路（IC） CPLD（复杂可编程逻辑器件） | INTEL 英特尔 | | ||
封装/外壳：44-LCC（J 形引线） 包装：托盘 描述：IC CPLD 64MC 10NS 44PLCC 集成电路（IC） CPLD（复杂可编程逻辑器件） | INTEL 英特尔 | | ||
Programmable Logic Device Family 文件：1.49779 Mbytes Page：66 Pages | ALTERA 阿尔特 | | ||
EPM7064SLC84-10N - 芯片, CPLD, MAX 7000, 64宏单元, PLCC84 | INTEL 英特尔 | | ||
30V N-Channel Logic Level PowerTrench BGA MOSFET General Description Combining Fairchild’s 30V PowerTrench process with state of the art BGA packaging, the FDZ7064N minimizes both PCB space and RDS(ON). This BGA MOSFET embodies a breakthrough in packaging technology which enables the device to combine excellent thermal transfer characteristics, | FAIRCHILD 仙童半导体 | | ||
LOW INPUT OFFSET VOLTAGE C-MOS OPERATIONAL AMPLIFIER??????? 文件：163.73 Kbytes Page：4 Pages | NJRC 日本无线 | | ||
LOW INPUT OFFSET VOLTAGE C-MOS OPERATIONAL AMPLIFIER??????? 文件：163.73 Kbytes Page：4 Pages | NJRC 日本无线 | | ||
LOW INPUT OFFSET VOLTAGE C-MOS OPERATIONAL AMPLIFIER??????? 文件：163.73 Kbytes Page：4 Pages | NJRC 日本无线 | | ||
LOW INPUT OFFSET VOLTAGE C-MOS OPERATIONAL AMPLIFIER??????? 文件：163.73 Kbytes Page：4 Pages | NJRC 日本无线 | |
EPM7064S产品属性
- 类型
描述
| IC供应商 | 芯片型号 | 品牌 | 批号 | 封装 | 库存 | 备注 | 价格 |
|---|---|---|---|---|---|---|---|
ALTERA/阿尔特拉 |
24+ |
TQFP |
1064 |
原厂直供,支持账期,免费供样,技术支持 |
|||
专订ALTER |
24+ |
QFP |
8000 |
只做自己库存,全新原装进口正品假一赔百,可开13%增 |
|||
ALTERA/阿尔特拉 |
25+ |
TQFP100 |
32000 |
ALTERA/阿尔特拉全新特价EPM7064STC100-10N即刻询购立享优惠#长期有货 |
|||
ALTERA |
23+ |
6000 |
原装现货特价 |
||||
ALTERA |
24+ |
QFP100 |
14870 |
ALTERA专营供货商,原装进口现货,假一赔十! |
|||
ALTERA(阿尔特拉) |
24+ |
6214 |
只做原装现货假一罚十!价格最低!只卖原装现货 |
||||
ALTERA(阿尔特拉) |
25+ |
标准封装 |
7163 |
我们只是原厂的搬运工 |
|||
ALTERA |
21+ |
PLCC44 |
5000 |
全新原装 鄙视假货 |
|||
ALTERA |
100-TQFP |
100 |
原盒原包装公司现货 |
||||
ALTERA |
21+ |
QFP-100 |
1000 |
只做原装正品!现货库存!可开13点增值税票 |
EPM7064S规格书下载地址
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EPM7064S数据表相关新闻
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EPM7128AETC100-10N是嵌入式 - CPLD（复杂可编程逻辑器件）系列集成电路 (IC) ，可工作在0°C ~ 85°C环境温度下，是一种表面贴装 式器件
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EPM7128AETC100-10N 公司主营军工级高端物料，优势渠道
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EPM7064AETI100-7N中文产品资料功能描述
2020-7-10EPM7064SLI44-7N 进口原装现货 产品线齐全
原装正品现货热卖中，焕盛达-专注原装 用芯服务；有其他物料需求可以按照品牌型号找业务询价；
2020-7-7EPM7064AEFC100
EP2AGX125DF25C4N ALTERA 19+ 5600 EP3SE110F1152C2N ALTERA 19+ 5600 EP4CE15F17C7N ALTERA 19+ 5600 EP4S100G5H40I1N ALTERA 19+ 5600 EP4S40G2F40I1N ALTERA 19+ 5600 EPM2210F324C3 ALTERA 19+ 5600 EP4SE230F29I3N ALTERA 19+ 5600 EP1K10QC208-1 ALTERA 19+ 5600 EPC16QC100T ALTERA 19+ 5600 EPM7128SQC100
2019-9-2
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