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EPM7064S价格
参考价格：￥68.9183
型号：EPM7064SLC44-10 品牌：Altera 备注：这里有EPM7064S多少钱，2025年最近7天走势，今日出价，今日竞价，EPM7064S批发/采购报价，EPM7064S行情走势销售排行榜，EPM7064S报价。| 型号 | 功能描述 | 生产厂家 企业 | LOGO | 操作 |
|---|---|---|---|---|
EPM7064S | Programmable Logic Device Family General Description The MAX 7000 family of high-density, high-performance PLDs is based on Altera’s second-generation MAX architecture. Fabricated with advanced CMOS technology, the EEPROM-based MAX 7000 family provides 600 to 5,000 usable gates, ISP, pin-to-pin delays as fast as 5 ns, and counte | Altera 阿尔特 |   | |
EPM7064S | Programmable Logic Device Family General Description The MAX 7000 family of high-density, high-performance PLDs is based on Altera’s second-generation MAX architecture. Fabricated with advanced CMOS technology, the EEPROM-based MAX 7000 family provides 600 to 5,000 usable gates, ISP, pin-to-pin delays as fast as 5 ns, and counte | Altera 阿尔特 | | |
EPM7064S | Programmable Logic Device Family General Description The MAX 7000 family of high-density, high-performance PLDs is based on Altera’s second-generation MAX architecture. Fabricated with advanced CMOS technology, the EEPROM-based MAX 7000 family provides 600 to 5,000 usable gates, ISP, pin-to-pin delays as fast as 5 ns, and counte | Altera 阿尔特 | | |
EPM7064S | Programmable Logic Device Family General Description The MAX 7000 family of high-density, high-performance PLDs is based on Altera’s second-generation MAX architecture. Fabricated with advanced CMOS technology, the EEPROM-based MAX 7000 family provides 600 to 5,000 usable gates, ISP, pin-to-pin delays as fast as 5 ns, and counte | Altera 阿尔特 | | |
EPM7064S | Programmable Logic Device Family General Description The MAX 7000 family of high-density, high-performance PLDs is based on Altera’s second-generation MAX architecture. Fabricated with advanced CMOS technology, the EEPROM-based MAX 7000 family provides 600 to 5,000 usable gates, ISP, pin-to-pin delays as fast as 5 ns, and counte | Altera 阿尔特 | | |
EPM7064S | Programmable Logic Device Family General Description The MAX 7000 family of high-density, high-performance PLDs is based on Altera’s second-generation MAX architecture. Fabricated with advanced CMOS technology, the EEPROM-based MAX 7000 family provides 600 to 5,000 usable gates, ISP, pin-to-pin delays as fast as 5 ns, and counte | Altera 阿尔特 | | |
EPM7064S | Programmable Logic Device Family General Description The MAX 7000 family of high-density, high-performance PLDs is based on Altera’s second-generation MAX architecture. Fabricated with advanced CMOS technology, the EEPROM-based MAX 7000 family provides 600 to 5,000 usable gates, ISP, pin-to-pin delays as fast as 5 ns, and counte | Altera 阿尔特 | | |
EPM7064S | Programmable Logic Device Family General Description The MAX 7000 family of high-density, high-performance PLDs is based on Altera’s second-generation MAX architecture. Fabricated with advanced CMOS technology, the EEPROM-based MAX 7000 family provides 600 to 5,000 usable gates, ISP, pin-to-pin delays as fast as 5 ns, and counte | Altera 阿尔特 | | |
EPM7064S | Programmable Logic Device Family General Description The MAX 7000 family of high-density, high-performance PLDs is based on Altera’s second-generation MAX architecture. Fabricated with advanced CMOS technology, the EEPROM-based MAX 7000 family provides 600 to 5,000 usable gates, ISP, pin-to-pin delays as fast as 5 ns, and counte | Altera 阿尔特 | | |
EPM7064S | Programmable Logic Device Family General Description The MAX 7000 family of high-density, high-performance PLDs is based on Altera’s second-generation MAX architecture. Fabricated with advanced CMOS technology, the EEPROM-based MAX 7000 family provides 600 to 5,000 usable gates, ISP, pin-to-pin delays as fast as 5 ns, and counte | Altera 阿尔特 | | |
EPM7064S | Programmable Logic Device Family General Description The MAX 7000 family of high-density, high-performance PLDs is based on Altera’s second-generation MAX architecture. Fabricated with advanced CMOS technology, the EEPROM-based MAX 7000 family provides 600 to 5,000 usable gates, ISP, pin-to-pin delays as fast as 5 ns, and counte | Altera 阿尔特 | | |
EPM7064S | Programmable Logic Device Family General Description The MAX 7000 family of high-density, high-performance PLDs is based on Altera’s second-generation MAX architecture. Fabricated with advanced CMOS technology, the EEPROM-based MAX 7000 family provides 600 to 5,000 usable gates, ISP, pin-to-pin delays as fast as 5 ns, and counte | Altera 阿尔特 | | |
EPM7064S | Programmable Logic Device Family General Description The MAX 7000 family of high-density, high-performance PLDs is based on Altera’s second-generation MAX architecture. Fabricated with advanced CMOS technology, the EEPROM-based MAX 7000 family provides 600 to 5,000 usable gates, ISP, pin-to-pin delays as fast as 5 ns, and counte | Altera 阿尔特 | | |
EPM7064S | Programmable Logic Device Family General Description The MAX 7000 family of high-density, high-performance PLDs is based on Altera’s second-generation MAX architecture. Fabricated with advanced CMOS technology, the EEPROM-based MAX 7000 family provides 600 to 5,000 usable gates, ISP, pin-to-pin delays as fast as 5 ns, and counte | Altera 阿尔特 | | |
EPM7064S | Programmable Logic Device Family Features ■ High-performance, EEPROM-based programmable logic devices (PLDs) based on second-generation MAX® architecture ■ 5.0-V in-system programmability (ISP) through the built-in IEEE Std. 1149.1 Joint Test Action Group (JTAG) interface available in MAX 7000S devices – ISP circuitry compa | Altera 阿尔特 | | |
EPM7064S | Programmable Logic Device Family | Intel 英特尔 | | |
EPM7064S | Programmable Logic Device Family 文件：1.49779 Mbytes Page：66 Pages | Altera 阿尔特 | | |
Programmable Logic Device Family General Description The MAX 7000 family of high-density, high-performance PLDs is based on Altera’s second-generation MAX architecture. Fabricated with advanced CMOS technology, the EEPROM-based MAX 7000 family provides 600 to 5,000 usable gates, ISP, pin-to-pin delays as fast as 5 ns, and counte | Altera 阿尔特 | | ||
Programmable Logic Device Family Description The MAX 7000 family of high-density, high-performance PLDs is based on Altera’s second-generation MAX architecture. Fabricated with advanced CMOS technology, the EEPROM-based MAX 7000 family provides 600 to 5,000 usable gates, ISP,pin-to-pin delays as fast as 5 ns, and counter speeds | Altera 阿尔特 | | ||
Programmable Logic Device Family General Description The MAX 7000 family of high-density, high-performance PLDs is based on Altera’s second-generation MAX architecture. Fabricated with advanced CMOS technology, the EEPROM-based MAX 7000 family provides 600 to 5,000 usable gates, ISP, pin-to-pin delays as fast as 5 ns, and counte | Altera 阿尔特 | | ||
Programmable Logic Device Family General Description The MAX 7000 family of high-density, high-performance PLDs is based on Altera’s second-generation MAX architecture. Fabricated with advanced CMOS technology, the EEPROM-based MAX 7000 family provides 600 to 5,000 usable gates, ISP, pin-to-pin delays as fast as 5 ns, and counte | Altera 阿尔特 | | ||
Programmable Logic Device Family General Description The MAX 7000 family of high-density, high-performance PLDs is based on Altera’s second-generation MAX architecture. Fabricated with advanced CMOS technology, the EEPROM-based MAX 7000 family provides 600 to 5,000 usable gates, ISP, pin-to-pin delays as fast as 5 ns, and counte | Altera 阿尔特 | | ||
High-performance, EEPROM-based programmable logic devices PLDs) based on second-generation MAX architecture General Description The MAX 7000 family of high-density, high-performance PLDs is based on Altera’s second-generation MAX architecture. Fabricated with advanced CMOS technology, the EEPROM-based MAX 7000 family provides 600 to 5,000 usable gates, ISP, pin-to-pin delays as fast as 5 ns, and counte | Altera 阿尔特 | | ||
Programmable Logic Device Family General Description The MAX 7000 family of high-density, high-performance PLDs is based on Altera’s second-generation MAX architecture. Fabricated with advanced CMOS technology, the EEPROM-based MAX 7000 family provides 600 to 5,000 usable gates, ISP, pin-to-pin delays as fast as 5 ns, and counte | Altera 阿尔特 | | ||
Programmable Logic Device Family General Description The MAX 7000 family of high-density, high-performance PLDs is based on Altera’s second-generation MAX architecture. Fabricated with advanced CMOS technology, the EEPROM-based MAX 7000 family provides 600 to 5,000 usable gates, ISP, pin-to-pin delays as fast as 5 ns, and counte | Altera 阿尔特 | | ||
Programmable Logic Device Family General Description The MAX 7000 family of high-density, high-performance PLDs is based on Altera’s second-generation MAX architecture. Fabricated with advanced CMOS technology, the EEPROM-based MAX 7000 family provides 600 to 5,000 usable gates, ISP, pin-to-pin delays as fast as 5 ns, and counte | Altera 阿尔特 | | ||
Programmable Logic Device Family General Description The MAX 7000 family of high-density, high-performance PLDs is based on Altera’s second-generation MAX architecture. Fabricated with advanced CMOS technology, the EEPROM-based MAX 7000 family provides 600 to 5,000 usable gates, ISP, pin-to-pin delays as fast as 5 ns, and counte | Altera 阿尔特 | | ||
Programmable Logic Device Family General Description The MAX 7000 family of high-density, high-performance PLDs is based on Altera’s second-generation MAX architecture. Fabricated with advanced CMOS technology, the EEPROM-based MAX 7000 family provides 600 to 5,000 usable gates, ISP, pin-to-pin delays as fast as 5 ns, and counte | Altera 阿尔特 | | ||
Programmable Logic Device Family General Description The MAX 7000 family of high-density, high-performance PLDs is based on Altera’s second-generation MAX architecture. Fabricated with advanced CMOS technology, the EEPROM-based MAX 7000 family provides 600 to 5,000 usable gates, ISP, pin-to-pin delays as fast as 5 ns, and counte | Altera 阿尔特 | | ||
Programmable Logic Device Family General Description The MAX 7000 family of high-density, high-performance PLDs is based on Altera’s second-generation MAX architecture. Fabricated with advanced CMOS technology, the EEPROM-based MAX 7000 family provides 600 to 5,000 usable gates, ISP, pin-to-pin delays as fast as 5 ns, and counte | Altera 阿尔特 | | ||
封装/外壳：44-LCC（J 形引线） 包装：托盘 描述：IC CPLD 64MC 10NS 44PLCC 集成电路（IC） CPLD（复杂可编程逻辑器件） | Intel 英特尔 | | ||
封装/外壳：44-LCC（J 形引线） 包装：托盘 描述：IC CPLD 64MC 10NS 44PLCC 集成电路（IC） CPLD（复杂可编程逻辑器件） | Intel 英特尔 | | ||
EPM7064SLC44-7N - 芯片, CPLD, MAX 7000, 64宏单元, PLCC44 | Intel 英特尔 | | ||
Programmable Logic Device Family 文件：1.49779 Mbytes Page：66 Pages | Altera 阿尔特 | | ||
EPM7064SLC84-10N - 芯片, CPLD, MAX 7000, 64宏单元, PLCC84 | Intel 英特尔 | | ||
Synchronous Buck PWM Controller General Description The APW7064 uses fixed 200kHz switching frequency, voltage mode, synchronous PWM controller which drives dual N-channel MOSFETs. The device integrates the control, monitoring and protection functions into a single package, provides one controlled power output with under-voltag | ANPEC 茂达电子 | | ||
Synchronous Buck PWM Controller General Description The APW7064 uses fixed 200kHz switching frequency, voltage mode, synchronous PWM controller which drives dual N-channel MOSFETs. The device integrates the control, monitoring and protection functions into a single package, provides one controlled power output with under-voltag | ANPEC 茂达电子 | | ||
Male Pins 文件：160.09 Kbytes Page：1 Pages | Heyco | | ||
Inverse DIN 41612 Header 文件：28.59 Kbytes Page：2 Pages | 3M | |
EPM7064S产品属性
- 类型
描述
- 型号
EPM7064S
- 制造商
ALTERA
- 制造商全称
Altera Corporation
- 功能描述
Programmable Logic Device Family
| IC供应商 | 芯片型号 | 品牌 | 批号 | 封装 | 库存 | 备注 | 价格 |
|---|---|---|---|---|---|---|---|
ALTERA |
20+ |
TQFP44 |
986 |
中国航天合格供方价格超越代理 |
|||
专订ALTER |
24+ |
QFP |
8000 |
只做自己库存,全新原装进口正品假一赔百,可开13%增 |
|||
ALTERA |
23+ |
TQFP44 |
5000 |
原装正品公司现货 |
|||
AKTERA |
2021+ |
QFP |
16800 |
全新原装正品,自家优势现货 |
|||
ALTERA |
18+ |
BGA |
800 |
||||
ALTERA/阿尔特拉 |
23+ |
PLCC |
9920 |
原装正品，支持实单 |
|||
ALTERA |
2023+ |
PLCC44 |
50000 |
原装现货 |
|||
ALTERA/阿尔特拉 |
25+ |
PLCC44 |
880000 |
明嘉莱只做原装正品现货 |
|||
ALTERA(阿尔特拉) |
24+ |
标准封装 |
7163 |
我们只是原厂的搬运工 |
|||
ALTERA |
23+ |
原厂原包 |
19960 |
只做进口原装 终端工厂免费送样 |
EPM7064S规格书下载地址
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EPM7064S数据表相关新闻
EPM7064QC100-10 CPLD - 复杂可编程逻辑器件
EPM7064QC100-10 CPLD - 复杂可编程逻辑器件 CPLD - MAX 7000 64 Macro 68 IOs
2023-4-27EPM7128AETC100-10N应用级别为商业级
EPM7128AETC100-10N是嵌入式 - CPLD（复杂可编程逻辑器件）系列集成电路 (IC) ，可工作在0°C ~ 85°C环境温度下，是一种表面贴装 式器件
2020-7-15EPM7128AETC100-10N原装正品
EPM7128AETC100-10N 公司主营军工级高端物料，优势渠道
2020-7-13EPM7064AETI100-7N中文产品资料功能描述
EPM7064AETI100-7N中文产品资料功能描述
2020-7-10EPM7064SLI44-7N 进口原装现货 产品线齐全
原装正品现货热卖中，焕盛达-专注原装 用芯服务；有其他物料需求可以按照品牌型号找业务询价；
2020-7-7EPM7064AEFC100
EP2AGX125DF25C4N ALTERA 19+ 5600 EP3SE110F1152C2N ALTERA 19+ 5600 EP4CE15F17C7N ALTERA 19+ 5600 EP4S100G5H40I1N ALTERA 19+ 5600 EP4S40G2F40I1N ALTERA 19+ 5600 EPM2210F324C3 ALTERA 19+ 5600 EP4SE230F29I3N ALTERA 19+ 5600 EP1K10QC208-1 ALTERA 19+ 5600 EPC16QC100T ALTERA 19+ 5600 EPM7128SQC100
2019-9-2
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