256M bits SDRAM

Description The EDS2504AC/AP is a 256M bits SDRAM organized as 16,777,216 words × 4 bits × 4 banks. The EDS2508 AC/AP is a 256M bits SDRAM organized as 8,388,608 words × 8 bits × 4 banks. The EDS2516 AC/AP is a 256M bits SDRAM organized as 4194304 words × 16 bits × 4 banks. All inputs and outputs

256M bits SDRAM

Description The EDS2516AP is a 256M bits SDRAM organized as 4,194,304 words × 16 bits × 4 banks. All inputs and outputs are referred to the rising edge of the clock input. It is packaged in standard 54-pin plastic TSOP (II) Features • 3.3V power supply • Clock frequency: 166MHz/133MHz (max.)

256M bits SDRAM

Description The EDS2516AP is a 256M bits SDRAM organized as 4,194,304 words × 16 bits × 4 banks. All inputs and outputs are referred to the rising edge of the clock input. It is packaged in standard 54-pin plastic TSOP (II) Features • 3.3V power supply • Clock frequency: 166MHz/133MHz (max.)

256M bits SDRAM

Description The EDS2504AC/AP is a 256M bits SDRAM organized as 16,777,216 words × 4 bits × 4 banks. The EDS2508 AC/AP is a 256M bits SDRAM organized as 8,388,608 words × 8 bits × 4 banks. The EDS2516 AC/AP is a 256M bits SDRAM organized as 4194304 words × 16 bits × 4 banks. All inputs and outputs

256M bits SDRAM

Description The EDS2516AP is a 256M bits SDRAM organized as 4,194,304 words × 16 bits × 4 banks. All inputs and outputs are referred to the rising edge of the clock input. It is packaged in standard 54-pin plastic TSOP (II) Features • 3.3V power supply • Clock frequency: 166MHz/133MHz (max.)

256M bits SDRAM

Description The EDS2516AP is a 256M bits SDRAM organized as 4,194,304 words × 16 bits × 4 banks. All inputs and outputs are referred to the rising edge of the clock input. It is packaged in standard 54-pin plastic TSOP (II) Features • 3.3V power supply • Clock frequency: 166MHz/133MHz (max.)

256M bits SDRAM WTR (Wide Temperature Range)

Description The EDS2504AC/AP is a 256M bits SDRAM organized as 16,777,216 words × 4 bits × 4 banks. The EDS2508 AC/AP is a 256M bits SDRAM organized as 8,388,608 words × 8 bits × 4 banks. The EDS2516 AC/AP is a 256M bits SDRAM organized as 4194304 words × 16 bits × 4 banks. All inputs and outputs

256M bits SDRAM WTR (Wide Temperature Range)

Description The EDS2516APTA is a 256M bits SDRAM organized as 4194304 words × 16 bits × 4 banks. All inputs and outputs are referred to the rising edge of the clock input. It is packaged in 54-pin plastic TSOP (II). Features • 3.3V power supply • Clock frequency: 133MHz (max.) • LVTTL interfa