型号 功能描述 生产厂家&企业 LOGO 操作
EDI88128C

128Kx8 MONOLITHIC SRAM, SMD 5962-89598

The EDI88128C is a high speed, high performance, Monolithic CMOS Static RAM organized as 128Kx8. The device is also available as EDI88130C with an additional chip select line (CS2) which will automatically power down the device when proper logic levels are applied. The second chip select line (

WEDC

128Kx8 Monolithic SRAM, SMD 5962-89598

The device has eight bi-directional input-output lines to provide simultaneous access to all bits in a word. An automatic power down feature permits the on-chip circuitry to enter a very low standby mode and be brought back into operation at a speed equal to the address access time. A Low Power

WEDC

128Kx8 Monolithic SRAM, SMD 5962-89598

The device has eight bi-directional input-output lines to provide simultaneous access to all bits in a word. An automatic power down feature permits the on-chip circuitry to enter a very low standby mode and be brought back into operation at a speed equal to the address access time. A Low Power

WEDC

128Kx8 Monolithic SRAM, SMD 5962-89598

The device has eight bi-directional input-output lines to provide simultaneous access to all bits in a word. An automatic power down feature permits the on-chip circuitry to enter a very low standby mode and be brought back into operation at a speed equal to the address access time. A Low Power

WEDC

128Kx8 Monolithic SRAM, SMD 5962-89598

The device has eight bi-directional input-output lines to provide simultaneous access to all bits in a word. An automatic power down feature permits the on-chip circuitry to enter a very low standby mode and be brought back into operation at a speed equal to the address access time. A Low Power

WEDC

128Kx8 Monolithic SRAM, SMD 5962-89598

The device has eight bi-directional input-output lines to provide simultaneous access to all bits in a word. An automatic power down feature permits the on-chip circuitry to enter a very low standby mode and be brought back into operation at a speed equal to the address access time. A Low Power

WEDC

128Kx8 Monolithic SRAM, SMD 5962-89598

The device has eight bi-directional input-output lines to provide simultaneous access to all bits in a word. An automatic power down feature permits the on-chip circuitry to enter a very low standby mode and be brought back into operation at a speed equal to the address access time. A Low Power

WEDC

128Kx8 Monolithic SRAM, SMD 5962-89598

The device has eight bi-directional input-output lines to provide simultaneous access to all bits in a word. An automatic power down feature permits the on-chip circuitry to enter a very low standby mode and be brought back into operation at a speed equal to the address access time. A Low Power

WEDC

128Kx8 Monolithic SRAM, SMD 5962-89598

The device has eight bi-directional input-output lines to provide simultaneous access to all bits in a word. An automatic power down feature permits the on-chip circuitry to enter a very low standby mode and be brought back into operation at a speed equal to the address access time. A Low Power

WEDC

128Kx8 Monolithic SRAM, SMD 5962-89598

The device has eight bi-directional input-output lines to provide simultaneous access to all bits in a word. An automatic power down feature permits the on-chip circuitry to enter a very low standby mode and be brought back into operation at a speed equal to the address access time. A Low Power

WEDC

128Kx8 Monolithic SRAM, SMD 5962-89598

The device has eight bi-directional input-output lines to provide simultaneous access to all bits in a word. An automatic power down feature permits the on-chip circuitry to enter a very low standby mode and be brought back into operation at a speed equal to the address access time. A Low Power

WEDC

128Kx8 Monolithic SRAM, SMD 5962-89598

The device has eight bi-directional input-output lines to provide simultaneous access to all bits in a word. An automatic power down feature permits the on-chip circuitry to enter a very low standby mode and be brought back into operation at a speed equal to the address access time. A Low Power

WEDC

128Kx8 Monolithic SRAM, SMD 5962-89598

The device has eight bi-directional input-output lines to provide simultaneous access to all bits in a word. An automatic power down feature permits the on-chip circuitry to enter a very low standby mode and be brought back into operation at a speed equal to the address access time. A Low Power

WEDC

128Kx8 Monolithic SRAM, SMD 5962-89598

The device has eight bi-directional input-output lines to provide simultaneous access to all bits in a word. An automatic power down feature permits the on-chip circuitry to enter a very low standby mode and be brought back into operation at a speed equal to the address access time. A Low Power

WEDC

128Kx8 Monolithic SRAM, SMD 5962-89598

The device has eight bi-directional input-output lines to provide simultaneous access to all bits in a word. An automatic power down feature permits the on-chip circuitry to enter a very low standby mode and be brought back into operation at a speed equal to the address access time. A Low Power

WEDC

128Kx8 Monolithic SRAM, SMD 5962-89598

The device has eight bi-directional input-output lines to provide simultaneous access to all bits in a word. An automatic power down feature permits the on-chip circuitry to enter a very low standby mode and be brought back into operation at a speed equal to the address access time. A Low Power

WEDC

128Kx8 Monolithic SRAM, SMD 5962-89598

The device has eight bi-directional input-output lines to provide simultaneous access to all bits in a word. An automatic power down feature permits the on-chip circuitry to enter a very low standby mode and be brought back into operation at a speed equal to the address access time. A Low Power

WEDC

128Kx8 Monolithic SRAM, SMD 5962-89598

The device has eight bi-directional input-output lines to provide simultaneous access to all bits in a word. An automatic power down feature permits the on-chip circuitry to enter a very low standby mode and be brought back into operation at a speed equal to the address access time. A Low Power

WEDC

128Kx8 Monolithic SRAM, SMD 5962-89598

The device has eight bi-directional input-output lines to provide simultaneous access to all bits in a word. An automatic power down feature permits the on-chip circuitry to enter a very low standby mode and be brought back into operation at a speed equal to the address access time. A Low Power

WEDC

128Kx8 Monolithic SRAM, SMD 5962-89598

The device has eight bi-directional input-output lines to provide simultaneous access to all bits in a word. An automatic power down feature permits the on-chip circuitry to enter a very low standby mode and be brought back into operation at a speed equal to the address access time. A Low Power

WEDC

128Kx8 Monolithic SRAM, SMD 5962-89598

The device has eight bi-directional input-output lines to provide simultaneous access to all bits in a word. An automatic power down feature permits the on-chip circuitry to enter a very low standby mode and be brought back into operation at a speed equal to the address access time. A Low Power

WEDC

128Kx8 Monolithic SRAM, SMD 5962-89598

The device has eight bi-directional input-output lines to provide simultaneous access to all bits in a word. An automatic power down feature permits the on-chip circuitry to enter a very low standby mode and be brought back into operation at a speed equal to the address access time. A Low Power

WEDC

128Kx8 Monolithic SRAM, SMD 5962-89598

The device has eight bi-directional input-output lines to provide simultaneous access to all bits in a word. An automatic power down feature permits the on-chip circuitry to enter a very low standby mode and be brought back into operation at a speed equal to the address access time. A Low Power

WEDC

128Kx8 Monolithic SRAM, SMD 5962-89598

The device has eight bi-directional input-output lines to provide simultaneous access to all bits in a word. An automatic power down feature permits the on-chip circuitry to enter a very low standby mode and be brought back into operation at a speed equal to the address access time. A Low Power

WEDC

128Kx8 Monolithic SRAM, SMD 5962-89598

The device has eight bi-directional input-output lines to provide simultaneous access to all bits in a word. An automatic power down feature permits the on-chip circuitry to enter a very low standby mode and be brought back into operation at a speed equal to the address access time. A Low Power

WEDC

128Kx8 Monolithic SRAM, SMD 5962-89598

The device has eight bi-directional input-output lines to provide simultaneous access to all bits in a word. An automatic power down feature permits the on-chip circuitry to enter a very low standby mode and be brought back into operation at a speed equal to the address access time. A Low Power

WEDC

128Kx8 MONOLITHIC SRAM, SMD 5962-89598

The EDI88128C is a high speed, high performance, Monolithic CMOS Static RAM organized as 128Kx8. The device is also available as EDI88130C with an additional chip select line (CS2) which will automatically power down the device when proper logic levels are applied. The second chip select line (

WEDC

128Kx8 MONOLITHIC SRAM, SMD 5962-89598

The EDI88128C is a high speed, high performance, Monolithic CMOS Static RAM organized as 128Kx8. The device is also available as EDI88130C with an additional chip select line (CS2) which will automatically power down the device when proper logic levels are applied. The second chip select line (

WEDC

128Kx8 MONOLITHIC SRAM, SMD 5962-89598

The EDI88128C is a high speed, high performance, Monolithic CMOS Static RAM organized as 128Kx8. The device is also available as EDI88130C with an additional chip select line (CS2) which will automatically power down the device when proper logic levels are applied. The second chip select line (

WEDC

128Kx8 MONOLITHIC SRAM, SMD 5962-89598

The EDI88128C is a high speed, high performance, Monolithic CMOS Static RAM organized as 128Kx8. The device is also available as EDI88130C with an additional chip select line (CS2) which will automatically power down the device when proper logic levels are applied. The second chip select line (

WEDC

128Kx8 MONOLITHIC SRAM, SMD 5962-89598

The EDI88128C is a high speed, high performance, Monolithic CMOS Static RAM organized as 128Kx8. The device is also available as EDI88130C with an additional chip select line (CS2) which will automatically power down the device when proper logic levels are applied. The second chip select line (

WEDC

128Kx8 MONOLITHIC SRAM, SMD 5962-89598

The EDI88128C is a high speed, high performance, Monolithic CMOS Static RAM organized as 128Kx8. The device is also available as EDI88130C with an additional chip select line (CS2) which will automatically power down the device when proper logic levels are applied. The second chip select line (

WEDC

128Kx8 MONOLITHIC SRAM, SMD 5962-89598

The EDI88128C is a high speed, high performance, Monolithic CMOS Static RAM organized as 128Kx8. The device is also available as EDI88130C with an additional chip select line (CS2) which will automatically power down the device when proper logic levels are applied. The second chip select line (

WEDC

128Kx8 MONOLITHIC SRAM, SMD 5962-89598

The EDI88128C is a high speed, high performance, Monolithic CMOS Static RAM organized as 128Kx8. The device is also available as EDI88130C with an additional chip select line (CS2) which will automatically power down the device when proper logic levels are applied. The second chip select line (

WEDC

EDI88128C产品属性

  • 类型

    描述

  • 型号

    EDI88128C

  • 制造商

    WEDC

  • 制造商全称

    White Electronic Designs Corporation

  • 功能描述

    128Kx8 MONOLITHIC SRAM, SMD 5962-89598

更新时间:2025-8-7 18:12:00
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EDI
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47
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EDI
21+
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6
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23+
2090
24+
DIP
6980
原装现货,可开13%税票
AD
23+
DIP28
9827
EDI
22+
CDIP
12245
现货,原厂原装假一罚十!
EDI
DIP
3350
一级代理 原装正品假一罚十价格优势长期供货
PHI
22+
DIP32
8000
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EDI
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LCC
126
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