-500mA/-50V Digital transistor

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-500mA/ -50V 数字晶体管（电阻内置型晶体管）

-500mA/ -50V 数字晶体管（电阻内置型晶体管）

丝印代码：L14；-500mA/-50V Digital transistor (with built-in resistor)

文件：1.05531 Mbytes Page：8 Pages

封装/外壳：TO-236-3，SC-59，SOT-23-3 包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 描述：DTB114GCHZG IS THE HIGH RELIABIL 分立半导体产品 晶体管 - 双极（BJT）- 单，预偏置

封装/外壳：TO-236-3，SC-59，SOT-23-3 包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 描述：PNP -500MA/-50V DIGITAL TRANSIST 分立半导体产品 晶体管 - 双极（BJT）- 单，预偏置

PNP SILICON BIAS RESISTOR TRANSISTOR

This new series of digital transistors is designed to replace a single device and its external resistor bias network. The BRT (Bias Resistor Transistor) contains a single transistor with a monolithic bias network consisting of two resistors; a series base resistor and a base–emitter resistor. The

Bias Resistor Transistor PNP Silicon Surface Mount Transistor with Monolithic Bias Resistor Network

The BRT (Bias Resistor Transistor) contains a single transistor with a monolithic bias network consisting of two resistors; a series base resistor and a base–emitter resistor. These digital transistors are designed to replace a single device and its xternal resistor bias network. The BRT eliminate

CASE 463-01, STYLE 1 SOT-416/SC-90

The BRT (Bias Resistor Transistor) contains a single transistor with a monolithic bias network consisting of two resistors; a series base resistor and a base–emitter resistor. These digital transistors are designed to replace a single device and its external resistor bias network. The BRT eliminat

CASE 463-01, STYLE 1 SOT-416/SC-90

Bias Resistor Transistor NPN Silicon Surface Mount Transistor with Monolithic Bias Resistor Network The BRT (Bias Resistor Transistor) contains a single transistor with a monolithic bias network consisting of two resistors; a series base resistor and a base–emitter resistor. These digital trans

0.25關m Sea of Gates and Customer Structured Arrays

DESCRIPTION Oki’s 0.25µm Application-Specific Integrated Circuit (ASIC) products are available in both Sea Of Gates (SOG) and Customer Structured Array (CSA) architectures. Both the SOG-based MG115P series and the CSA-based MG75P series use a five-layer metal process on 0.25µm drawn (0.18µm L-eff