15V LOW VCE(sat) PNP SURFACE MOUNT TRANSISTOR

Features • BVCEO > -15V • IC = -500mA High Collector Current • ICM = -1A Peak Pulse Current • PD = 1000mW Power Dissipation • Low Collector-Emitter Saturation Voltage, VCE(sat) • 0.60mm2 Package Footprint, 13 times Smaller than SOT23 • 0.5mm Height Package Minimizing Off-Board Profile • Co

PNP, 15V, 0.5A, DFN1006-3

15V LOW VCE(sat) PNP SURFACE MOUNT TRANSISTOR

Features • BVCEO > -15V • IC = -500mA High Collector Current • ICM = -1A Peak Pulse Current • PD = 1000mW Power Dissipation • Low Collector-Emitter Saturation Voltage, VCE(sat) • 0.60mm2 Package Footprint, 13 times Smaller than SOT23 • 0.5mm Height Package Minimizing Off-Board Profile • Co

15V LOW VCE(sat) PNP SURFACE MOUNT TRANSISTOR

Features • BVCEO > -15V • IC = -500mA High Collector Current • ICM = -1A Peak Pulse Current • PD = 1000mW Power Dissipation • Low Collector-Emitter Saturation Voltage, VCE(sat) • 0.60mm2 Package Footprint, 13 times Smaller than SOT23 • 0.5mm Height Package Minimizing Off-Board Profile • Co

15V PNP LOW VCE(sat) TRANSISTOR

文件：374.57 Kbytes Page：7 Pages

封装/外壳：3-UFDFN 包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 描述：TRANS PNP 15V 0.5A 3DFN 分立半导体产品 晶体管 - 双极性晶体管（BJT）- 单个

15V PNP LOW VCESAT TRANSISTOR

封装/外壳：3-UFDFN 包装：卷带（TR） 描述：SS LOW SAT TRANSISTOR X1-DFN1006 分立半导体产品 晶体管 - 双极性晶体管（BJT）- 单个

15 V low VCEsat PNP double transistor

DESCRIPTION PNP low VCEsat double transistor in a SOT666 plastic package. NPN complement: PBSS2515VS. FEATURES • 300 mW total power dissipation • Very small 1.6 x 1.2 mm ultra thin package • Self alignment during soldering due to straight leads • Low collector-emitter saturation voltage •

4-Bit Single-Chip Microcomputer(For Data Bank Use)

DESCRIPTION The SM3515 is a CMOS 4-bit single-chip microcomputer for databank incorporating data memory RAM, LCD driver, key input circuits and buzzer output circuit. By connecting an external crystal, a 1Hz timer interrupt is made possible for easier clock function. FEATURES • ROM capa

N-Channel Enhancement-Mode Vertical DMOS FETs

Advanced DMOS Technology These enhancement-mode (normally-off) transistors utilize a vertical DMOS structure and Supertexs well-proven silicon-gate manufacturing process. This combination produces devices with the power handling capabilities of bipolar transistors and with the high input impedan

900 MHz analog cordless telephone IC

文件：180.01 Kbytes Page：44 Pages

900 MHz analog cordless telephone IC

文件：180.01 Kbytes Page：44 Pages