DS90LV028A 3V LVDS Dual CMOS Differential Line Receiver

文件：1.14605 Mbytes Page：18 Pages

封装/外壳：8-SOIC（0.154"，3.90mm 宽） 包装：托盘 描述：IC RECEIVER 0/2 8SOIC 集成电路（IC） 驱动器，接收器，收发器

3V LVDS Dual CMOS Differential Line Receiver

文件：247.01 Kbytes Page：10 Pages

DS90LV028A 3-V LVDS Dual CMOS Differential Line Receiver

1 Features 1• >400-Mbps (200 MHz) Switching Rates • 50-ps Differential Skew (Typical) • 0.1-ns Channel-to-Channel Skew (Typical) • 2.5-ns Maximum Propagation Delay • 3.3-V Power Supply Design • Flow-Through Pinout • Power Down High Impedance on LVDS Inputs • Low Power Design (18 mW at 3.3-

DS90LV028A 3-V LVDS Dual CMOS Differential Line Receiver

1 Features 1• >400-Mbps (200 MHz) Switching Rates • 50-ps Differential Skew (Typical) • 0.1-ns Channel-to-Channel Skew (Typical) • 2.5-ns Maximum Propagation Delay • 3.3-V Power Supply Design • Flow-Through Pinout • Power Down High Impedance on LVDS Inputs • Low Power Design (18 mW at 3.3-

DS90LV028A 3-V LVDS Dual CMOS Differential Line Receiver

1 Features 1• >400-Mbps (200 MHz) Switching Rates • 50-ps Differential Skew (Typical) • 0.1-ns Channel-to-Channel Skew (Typical) • 2.5-ns Maximum Propagation Delay • 3.3-V Power Supply Design • Flow-Through Pinout • Power Down High Impedance on LVDS Inputs • Low Power Design (18 mW at 3.3-

DS90LV028A 3-V LVDS Dual CMOS Differential Line Receiver

1 Features 1• >400-Mbps (200 MHz) Switching Rates • 50-ps Differential Skew (Typical) • 0.1-ns Channel-to-Channel Skew (Typical) • 2.5-ns Maximum Propagation Delay • 3.3-V Power Supply Design • Flow-Through Pinout • Power Down High Impedance on LVDS Inputs • Low Power Design (18 mW at 3.3-

DS90LV028A 3V LVDS Dual CMOS Differential Line Receiver

文件：1.14605 Mbytes Page：18 Pages

封装/外壳：8-SOIC（0.154"，3.90mm 宽） 包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 描述：IC RECEIVER 0/2 8SOIC 集成电路（IC） 驱动器，接收器，收发器

DS90LV028A 3V LVDS Dual CMOS Differential Line Receiver

文件：1.14605 Mbytes Page：18 Pages

DS90LV028A 3-V LVDS Dual CMOS Differential Line Receiver

1 Features 1• >400-Mbps (200 MHz) Switching Rates • 50-ps Differential Skew (Typical) • 0.1-ns Channel-to-Channel Skew (Typical) • 2.5-ns Maximum Propagation Delay • 3.3-V Power Supply Design • Flow-Through Pinout • Power Down High Impedance on LVDS Inputs • Low Power Design (18 mW at 3.3-

DS90LV028A-Q1 Automotive LVDS Dual Differential Line Receiver

1 Features • AEC-Q100 qualified for automotive applications – Temperature grade 2: -40°C to +105°C • >400 Mbps (200 MHz) switching rates • 50 ps differential skew (typical) • 0.1 ns channel-to-channel skew (typical) • 2.5 ns maximum propagation delay • 3.3 V power supply design • Flow-thro

3V LVDS Dual CMOS Differential Line Receiver

文件：247.01 Kbytes Page：10 Pages

DS90LV028A-Q1 Automotive LVDS Dual Differential Line Receiver

文件：884.78 Kbytes Page：20 Pages