DS90C032QML LVDS Quad CMOS Differential Line Receiver

1FEATURES 2• Single Event Latchup (SEL) Immune 120 MeVcm2/ mg • High Impedance LVDS Inputs with Power-Off. • Accepts Small Swing (330 mV) Differential Signal Levels • Low Power Dissipation • Low Differential Skew • Low Chip to Chip Skew • Pin Compatible with DS26C32A • Compatible with IE

LVDS 四路 CMOS 差动线路接收器

The DS90C032 is a quad CMOS differential line receiver designed for applications requiring ultra low power dissipation and high data rates.The DS90C032 accepts low voltage differential input signals and translates them to CMOS (TTL compatible) output levels. The receiver supports a TRI-STATE functio • Single Event Latchup (SEL) Immune 120 MeV-cm2/mg\n• High Impedance LVDS Inputs with Power-Off.\n• Accepts Small Swing (330 mV) Differential Signal Levels\n• Low Power Dissipation\n• Low Differential Skew\n• Low Chip to Chip Skew\n• Pin Compatible with DS26C32A \n• Compatible with IEEE 1596.3 SCI L;

LVDS Quad CMOS Differential Line Receiver

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LVDS Quad CMOS Differential Line Receiver

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LVDS Quad CMOS Differential Line Receiver

文件：160.65 Kbytes Page：9 Pages

LVDS Quad CMOS Differential Line Receiver

文件：160.65 Kbytes Page：9 Pages

LVDS Quad CMOS Differential Line Receiver

文件：231.83 Kbytes Page：12 Pages

LVDS Quad CMOS Differential Line Receiver

文件：231.83 Kbytes Page：12 Pages