位置:DS90C032QML-SP > DS90C032QML-SP详情

DS90C032QML-SP中文资料

厂家型号

DS90C032QML-SP

文件大小

869.18Kbytes

页面数量

22

功能描述

DS90C032QML LVDS Quad CMOS Differential Line Receiver

数据手册

下载地址一下载地址二到原厂下载

生产厂商

TI2

DS90C032QML-SP数据手册规格书PDF详情

1FEATURES

2• Single Event Latchup (SEL) Immune 120 MeVcm2/

mg

• High Impedance LVDS Inputs with Power-Off.

• Accepts Small Swing (330 mV) Differential

Signal Levels

• Low Power Dissipation

• Low Differential Skew

• Low Chip to Chip Skew

• Pin Compatible with DS26C32A

• Compatible with IEEE 1596.3 SCI LVDS

Standard

DESCRIPTION

The DS90C032 is a quad CMOS differential line

receiver designed for applications requiring ultra low

power dissipation and high data rates.

The DS90C032 accepts low voltage differential input

signals and translates them to CMOS (TTL compatible) output levels. The receiver supports a

TRI-STATE function that may be used to multiplex

outputs. The receiver also supports OPEN Failsafe

and terminated (100Ω) input Failsafe with the addition

of external failsafe biasing. Receiver output will be

HIGH for both Failsafe conditions.

The DS90C032 provides power-off high impedance

LVDS inputs. This feature assures minimal loading

effect on the LVDS bus lines when VCC is not

present.

The DS90C032 and companion line driver

(DS90C031) provide a new alternative to high power

pseudo-ECL devices for high speed point-to-point

interface applications.

更新时间:2025-10-11 15:01:00
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