Triple 3-Input NOR Gate

General Description This device contains three independent gates each of which performs the logic NOR function.

TRIPLE 3-INPUT NOR GATES

文件：58 Kbytes Page：2 Pages

Triple 3-Input NOR Gate

TRIPLE 3-INPUT NOR GATES

8-Bit Register with Clear

General Description The DM74LS273 is a high speed 8-bit register, consisting of eight D-type flip-flops with a common Clock and an asynchronous active LOW Master Reset. This device is supplied in a 20-pin package featuring 0.3 inch row spacing. Features ■ Edge-triggered ■ 8-bit high speed regi

8-Bit Register with Clear

General Description The DM74LS273 is a high speed 8-bit register, consisting of eight D-type flip-flops with a common Clock and an asynchronous active LOW Master Reset. This device is supplied in a 20-pin package featuring 0.3 inch row spacing. Features ■ Edge-triggered ■ 8-bit high speed regi

8-Bit Register with Clear

General Description The DM74LS273 is a high speed 8-bit register, consisting of eight D-type flip-flops with a common Clock and an asynchronous active LOW Master Reset. This device is supplied in a 20-pin package featuring 0.3 inch row spacing. Features ■ Edge-triggered ■ 8-bit high speed regi

8-Bit Register with Clear

General Description The DM74LS273 is a high speed 8-bit register, consisting of eight D-type flip-flops with a common Clock and an asynchronous active LOW Master Reset. This device is supplied in a 20-pin package featuring 0.3 inch row spacing. Features ■ Edge-triggered ■ 8-bit high speed regi

Quad S-R Latch

General Description The DM74LS279 consists of four individual and independent Set-Reset Latches with active low inputs. Two of the four latches have an additional Sinput ANDed with the primary Sinput. A LOW on any Sinput while the Rinput is HIGH will be stored in the latch and appear on the corre

Quad S-R Latch

General Description The DM74LS279 consists of four individual and independent Set-Reset Latches with active low inputs. Two of the four latches have an additional Sinput ANDed with the primary Sinput. A LOW on any Sinput while the Rinput is HIGH will be stored in the latch and appear on the corre

Quad S-R Latch

General Description The DM74LS279 consists of four individual and independent Set-Reset Latches with active low inputs. Two of the four latches have an additional Sinput ANDed with the primary Sinput. A LOW on any Sinput while the Rinput is HIGH will be stored in the latch and appear on the corre

Triple 3-Input NOR Gate

General Description This device contains three independent gates each of which performs the logic NOR function.

Triple 3-Input NOR Gate

General Description This device contains three independent gates each of which performs the logic NOR function.

8-BIT REGISTER WITH CLEAR

文件：78.16 Kbytes Page：3 Pages

8-BIT REGISTER WITH CLEAR

8-BIT REGISTER WITH CLEAR

文件：78.16 Kbytes Page：3 Pages

8-Bit Register with Clear

文件：142.02 Kbytes Page：6 Pages

8-Bit Register with Clear

文件：142.02 Kbytes Page：6 Pages

8-BIT REGISTER WITH CLEAR

文件：78.16 Kbytes Page：3 Pages

封装/外壳：20-SOIC（0.295"，7.50mm 宽） 功能：主复位 包装：袋 描述：IC FF D-TYPE SNGL 8BIT 20SOIC 集成电路（IC） 触发器

Quad S-R Latches

文件：387.54 Kbytes Page：8 Pages

Quad S-R Latches

文件：137.77 Kbytes Page：6 Pages

Quad S-R Latches

文件：137.77 Kbytes Page：6 Pages

封装/外壳：16-DIP（0.300"，7.62mm） 包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 描述：IC LATCH QUAD S/R 16-DIP 集成电路（IC） 锁存器

TRIPLE 3-INPUT NOR GATES

文件：58 Kbytes Page：2 Pages

TRIPLE 3-INPUT NOR GATES

文件：58 Kbytes Page：2 Pages

Triple 3-input Positive NOR Gates

Triple 3-input Positive NOR Gates

TRIPLE 3-INPUT NOR GATE

TRIPLE 3-INPUT NOR GATE

TRIPLE 3-INPUT NOR GATE

TRIPLE 3-INPUT NOR GATE

TRIPLE 3-INPUT NOR GATE

TRIPLE 3-INPUT NOR GATE

TRIPLE 3-INPUT NOR GATE

TRIPLE 3-INPUT NOR GATE

Quadruple S-R Latches

Ouadruple 2-input Positive NAND Gates

Quadruple S-R Latches

Quadruple S-R Latches

QUAD SET-RESET LATCH