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型号	功能描述	生产厂家企业	LOGO
CY7C1911CV18	18-Mbit QDR??II SRAM 4-Word Burst Architecture Functional Description The CY7C1311CV18, CY7C1911CV18, CY7C1313CV18, and CY7C1315CV18 are 1.8V Synchronous Pipelined SRAMs, equipped with QDR™-II architecture. QDR-II architecture consists of two separate ports: the read port and the write port to access the memory array. The read port has dedica	CYPRESSCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	CYPRESS
CY7C1911CV18-167BZC	18-Mbit QDR??II SRAM 4-Word Burst Architecture Functional Description The CY7C1311CV18, CY7C1911CV18, CY7C1313CV18, and CY7C1315CV18 are 1.8V Synchronous Pipelined SRAMs, equipped with QDR™-II architecture. QDR-II architecture consists of two separate ports: the read port and the write port to access the memory array. The read port has dedica	CYPRESSCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	CYPRESS
CY7C1911CV18-167BZI	18-Mbit QDR??II SRAM 4-Word Burst Architecture Functional Description The CY7C1311CV18, CY7C1911CV18, CY7C1313CV18, and CY7C1315CV18 are 1.8V Synchronous Pipelined SRAMs, equipped with QDR™-II architecture. QDR-II architecture consists of two separate ports: the read port and the write port to access the memory array. The read port has dedica	CYPRESSCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	CYPRESS
CY7C1911CV18-167BZXC	18-Mbit QDR??II SRAM 4-Word Burst Architecture Functional Description The CY7C1311CV18, CY7C1911CV18, CY7C1313CV18, and CY7C1315CV18 are 1.8V Synchronous Pipelined SRAMs, equipped with QDR™-II architecture. QDR-II architecture consists of two separate ports: the read port and the write port to access the memory array. The read port has dedica	CYPRESSCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	CYPRESS
CY7C1911CV18-167BZXI	18-Mbit QDR??II SRAM 4-Word Burst Architecture Functional Description The CY7C1311CV18, CY7C1911CV18, CY7C1313CV18, and CY7C1315CV18 are 1.8V Synchronous Pipelined SRAMs, equipped with QDR™-II architecture. QDR-II architecture consists of two separate ports: the read port and the write port to access the memory array. The read port has dedica	CYPRESSCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	CYPRESS
CY7C1911CV18-200BZC	18-Mbit QDR??II SRAM 4-Word Burst Architecture Functional Description The CY7C1311CV18, CY7C1911CV18, CY7C1313CV18, and CY7C1315CV18 are 1.8V Synchronous Pipelined SRAMs, equipped with QDR™-II architecture. QDR-II architecture consists of two separate ports: the read port and the write port to access the memory array. The read port has dedica	CYPRESSCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	CYPRESS
CY7C1911CV18-200BZI	18-Mbit QDR??II SRAM 4-Word Burst Architecture Functional Description The CY7C1311CV18, CY7C1911CV18, CY7C1313CV18, and CY7C1315CV18 are 1.8V Synchronous Pipelined SRAMs, equipped with QDR™-II architecture. QDR-II architecture consists of two separate ports: the read port and the write port to access the memory array. The read port has dedica	CYPRESSCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	CYPRESS
CY7C1911CV18-200BZXC	18-Mbit QDR??II SRAM 4-Word Burst Architecture Functional Description The CY7C1311CV18, CY7C1911CV18, CY7C1313CV18, and CY7C1315CV18 are 1.8V Synchronous Pipelined SRAMs, equipped with QDR™-II architecture. QDR-II architecture consists of two separate ports: the read port and the write port to access the memory array. The read port has dedica	CYPRESSCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	CYPRESS
CY7C1911CV18-200BZXI	18-Mbit QDR??II SRAM 4-Word Burst Architecture Functional Description The CY7C1311CV18, CY7C1911CV18, CY7C1313CV18, and CY7C1315CV18 are 1.8V Synchronous Pipelined SRAMs, equipped with QDR™-II architecture. QDR-II architecture consists of two separate ports: the read port and the write port to access the memory array. The read port has dedica	CYPRESSCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	CYPRESS
CY7C1911CV18-250BZC	18-Mbit QDR??II SRAM 4-Word Burst Architecture Functional Description The CY7C1311CV18, CY7C1911CV18, CY7C1313CV18, and CY7C1315CV18 are 1.8V Synchronous Pipelined SRAMs, equipped with QDR™-II architecture. QDR-II architecture consists of two separate ports: the read port and the write port to access the memory array. The read port has dedica	CYPRESSCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	CYPRESS
CY7C1911CV18-250BZI	18-Mbit QDR??II SRAM 4-Word Burst Architecture Functional Description The CY7C1311CV18, CY7C1911CV18, CY7C1313CV18, and CY7C1315CV18 are 1.8V Synchronous Pipelined SRAMs, equipped with QDR™-II architecture. QDR-II architecture consists of two separate ports: the read port and the write port to access the memory array. The read port has dedica	CYPRESSCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	CYPRESS
CY7C1911CV18-250BZXC	18-Mbit QDR??II SRAM 4-Word Burst Architecture Functional Description The CY7C1311CV18, CY7C1911CV18, CY7C1313CV18, and CY7C1315CV18 are 1.8V Synchronous Pipelined SRAMs, equipped with QDR™-II architecture. QDR-II architecture consists of two separate ports: the read port and the write port to access the memory array. The read port has dedica	CYPRESSCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	CYPRESS
CY7C1911CV18-250BZXI	18-Mbit QDR??II SRAM 4-Word Burst Architecture Functional Description The CY7C1311CV18, CY7C1911CV18, CY7C1313CV18, and CY7C1315CV18 are 1.8V Synchronous Pipelined SRAMs, equipped with QDR™-II architecture. QDR-II architecture consists of two separate ports: the read port and the write port to access the memory array. The read port has dedica	CYPRESSCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	CYPRESS
CY7C1911CV18-278BZC	18-Mbit QDR??II SRAM 4-Word Burst Architecture Functional Description The CY7C1311CV18, CY7C1911CV18, CY7C1313CV18, and CY7C1315CV18 are 1.8V Synchronous Pipelined SRAMs, equipped with QDR™-II architecture. QDR-II architecture consists of two separate ports: the read port and the write port to access the memory array. The read port has dedica	CYPRESSCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	CYPRESS
CY7C1911CV18-278BZI	18-Mbit QDR??II SRAM 4-Word Burst Architecture Functional Description The CY7C1311CV18, CY7C1911CV18, CY7C1313CV18, and CY7C1315CV18 are 1.8V Synchronous Pipelined SRAMs, equipped with QDR™-II architecture. QDR-II architecture consists of two separate ports: the read port and the write port to access the memory array. The read port has dedica	CYPRESSCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	CYPRESS
CY7C1911CV18-278BZXC	18-Mbit QDR??II SRAM 4-Word Burst Architecture Functional Description The CY7C1311CV18, CY7C1911CV18, CY7C1313CV18, and CY7C1315CV18 are 1.8V Synchronous Pipelined SRAMs, equipped with QDR™-II architecture. QDR-II architecture consists of two separate ports: the read port and the write port to access the memory array. The read port has dedica	CYPRESSCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	CYPRESS
CY7C1911CV18-278BZXI	18-Mbit QDR??II SRAM 4-Word Burst Architecture Functional Description The CY7C1311CV18, CY7C1911CV18, CY7C1313CV18, and CY7C1315CV18 are 1.8V Synchronous Pipelined SRAMs, equipped with QDR™-II architecture. QDR-II architecture consists of two separate ports: the read port and the write port to access the memory array. The read port has dedica	CYPRESSCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	CYPRESS
CY7C1911CV18-300BZC	18-Mbit QDR??II SRAM 4-Word Burst Architecture Functional Description The CY7C1311CV18, CY7C1911CV18, CY7C1313CV18, and CY7C1315CV18 are 1.8V Synchronous Pipelined SRAMs, equipped with QDR™-II architecture. QDR-II architecture consists of two separate ports: the read port and the write port to access the memory array. The read port has dedica	CYPRESSCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	CYPRESS
CY7C1911CV18-300BZI	18-Mbit QDR??II SRAM 4-Word Burst Architecture Functional Description The CY7C1311CV18, CY7C1911CV18, CY7C1313CV18, and CY7C1315CV18 are 1.8V Synchronous Pipelined SRAMs, equipped with QDR™-II architecture. QDR-II architecture consists of two separate ports: the read port and the write port to access the memory array. The read port has dedica	CYPRESSCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	CYPRESS
CY7C1911CV18-300BZXC	18-Mbit QDR??II SRAM 4-Word Burst Architecture Functional Description The CY7C1311CV18, CY7C1911CV18, CY7C1313CV18, and CY7C1315CV18 are 1.8V Synchronous Pipelined SRAMs, equipped with QDR™-II architecture. QDR-II architecture consists of two separate ports: the read port and the write port to access the memory array. The read port has dedica	CYPRESSCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	CYPRESS
CY7C1911CV18-300BZXI	18-Mbit QDR??II SRAM 4-Word Burst Architecture Functional Description The CY7C1311CV18, CY7C1911CV18, CY7C1313CV18, and CY7C1315CV18 are 1.8V Synchronous Pipelined SRAMs, equipped with QDR™-II architecture. QDR-II architecture consists of two separate ports: the read port and the write port to access the memory array. The read port has dedica	CYPRESSCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	CYPRESS

CY7C1911CV18供应商更多...

更新时间：2026-3-17 23:04:00

IC供应商	芯片型号	品牌	批号	封装	库存	备注	价格
深圳诚思涵科技有限公司	CY7C1911JV18-300BZC	CYPRESS/赛普拉斯	24+	BGA272	6618	公司现货库存,支持实单	询价
深圳市科芯源微电子有限公司	CY7C1911JV18-300BZC	CYPRESS/赛普拉斯	2026+	BGA	119	原装正品,假一罚十!	询价
深圳市河锋鑫科技有限公司	CY7C1911JV18300BZC	Cypress	22+	165FBGA (13x15)	9000	原厂渠道,现货配单	询价
深圳市振宏微科技有限公司	CY7C1911KV18-250BZC	CYPRESS	23+	BGAQFP	8659	原装公司现货!原装正品价格优势.	询价
深圳市冠亿通科技有限公司	CY7C1911JV18-300BZC	Infineon Technologies			18500	全新原厂原装现货!受权代理!可送样可提供技术支持!	询价
华富测量(深圳)传感技术有限公司	CY7C1911JV18-300BZC	CYPRESS	2138+	原厂标准封装	8960	代理CYPRESS全系列芯片,原装现货	询价
深圳市恒凯威科技开发有限公司	CY7C1911KV18-250BZC	Cypress(赛普拉斯)	21+	FBGA-165	30000	只做原装,质量保证	询价
深圳市赛特兴科技有限公司	CY7C1911KV18-250BZC	Cypress(赛普拉斯)	23+	标准封装	6000	正规渠道,只有原装!	询价
深圳市毅创腾电子科技有限公司	CY7C1911JV18-300BZC	Cypress		165-FBGA	4600	Cypress一级分销,原装原盒原包装!	询价
深圳市正纳电子有限公司	CY7C1911KV18-250BZC	Cypress(赛普拉斯)	23+	NA	20094	正纳10年以上分销经验原装进口正品做服务做口碑有支持	询价

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CY7C1911CV18规格书下载地址

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CY7C1911CV18数据表相关新闻

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DdatasheetPDF页码索引