CY7C1383D价格

参考价格:¥146.3304

型号:CY7C1383D-133AXC 品牌:Cynergy 3 备注:这里有CY7C1383D多少钱,2025年最近7天走势,今日出价,今日竞价,CY7C1383D批发/采购报价,CY7C1383D行情走势销售排行榜,CY7C1383D报价。
型号 功能描述 生产厂家 企业 LOGO 操作
CY7C1383D

18-Mbit (512K x 36/1M x 18) Flow-Through SRAM

Functional Description [1] The CY7C1381D/CY7C1383D/CY7C1381F/CY7C1383F is a 3.3V, 512K x 36 and 1M x 18 synchronous flow through SRAMs, designed to interface with high-speed microprocessors with minimum glue logic. Maximum access delay from clock rise is 6.5 ns (133 MHz version). A 2-bit on-chip

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

CY7C1383D

18-Mbit (512K x 36/1M x 18) Flow-Through SRAM

文件:1.22244 Mbytes Page:29 Pages

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

CY7C1383D

18 Mbit (512 K 횞 36/1 M 횞 18) Flow Through SRAM

文件:1.15175 Mbytes Page:34 Pages

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

CY7C1383D

18-Mbit (512 K x 36/1 M x 18) Flow-Through SRAM

文件:1.10335 Mbytes Page:37 Pages

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

18-Mbit (512K x 36/1M x 18) Flow-Through SRAM

Functional Description [1] The CY7C1381D/CY7C1383D/CY7C1381F/CY7C1383F is a 3.3V, 512K x 36 and 1M x 18 synchronous flow through SRAMs, designed to interface with high-speed microprocessors with minimum glue logic. Maximum access delay from clock rise is 6.5 ns (133 MHz version). A 2-bit on-chip

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

18-Mbit (512K x 36/1M x 18) Flow-Through SRAM

Functional Description [1] The CY7C1381D/CY7C1383D/CY7C1381F/CY7C1383F is a 3.3V, 512K x 36 and 1M x 18 synchronous flow through SRAMs, designed to interface with high-speed microprocessors with minimum glue logic. Maximum access delay from clock rise is 6.5 ns (133 MHz version). A 2-bit on-chip

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

18-Mbit (512K x 36/1M x 18) Flow-Through SRAM

Functional Description [1] The CY7C1381D/CY7C1383D/CY7C1381F/CY7C1383F is a 3.3V, 512K x 36 and 1M x 18 synchronous flow through SRAMs, designed to interface with high-speed microprocessors with minimum glue logic. Maximum access delay from clock rise is 6.5 ns (133 MHz version). A 2-bit on-chip

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

18-Mbit (512K x 36/1M x 18) Flow-Through SRAM

Functional Description [1] The CY7C1381D/CY7C1383D/CY7C1381F/CY7C1383F is a 3.3V, 512K x 36 and 1M x 18 synchronous flow through SRAMs, designed to interface with high-speed microprocessors with minimum glue logic. Maximum access delay from clock rise is 6.5 ns (133 MHz version). A 2-bit on-chip

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

18-Mbit (512K x 36/1M x 18) Flow-Through SRAM

Functional Description [1] The CY7C1381D/CY7C1383D/CY7C1381F/CY7C1383F is a 3.3V, 512K x 36 and 1M x 18 synchronous flow through SRAMs, designed to interface with high-speed microprocessors with minimum glue logic. Maximum access delay from clock rise is 6.5 ns (133 MHz version). A 2-bit on-chip

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

18-Mbit (512K x 36/1M x 18) Flow-Through SRAM

Functional Description [1] The CY7C1381D/CY7C1383D/CY7C1381F/CY7C1383F is a 3.3V, 512K x 36 and 1M x 18 synchronous flow through SRAMs, designed to interface with high-speed microprocessors with minimum glue logic. Maximum access delay from clock rise is 6.5 ns (133 MHz version). A 2-bit on-chip

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

18-Mbit (512K x 36/1M x 18) Flow-Through SRAM

Functional Description [1] The CY7C1381D/CY7C1383D/CY7C1381F/CY7C1383F is a 3.3V, 512K x 36 and 1M x 18 synchronous flow through SRAMs, designed to interface with high-speed microprocessors with minimum glue logic. Maximum access delay from clock rise is 6.5 ns (133 MHz version). A 2-bit on-chip

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

18-Mbit (512K x 36/1M x 18) Flow-Through SRAM

Functional Description [1] The CY7C1381D/CY7C1383D/CY7C1381F/CY7C1383F is a 3.3V, 512K x 36 and 1M x 18 synchronous flow through SRAMs, designed to interface with high-speed microprocessors with minimum glue logic. Maximum access delay from clock rise is 6.5 ns (133 MHz version). A 2-bit on-chip

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

18-Mbit (512K x 36/1M x 18) Flow-Through SRAM

Functional Description [1] The CY7C1381D/CY7C1383D/CY7C1381F/CY7C1383F is a 3.3V, 512K x 36 and 1M x 18 synchronous flow through SRAMs, designed to interface with high-speed microprocessors with minimum glue logic. Maximum access delay from clock rise is 6.5 ns (133 MHz version). A 2-bit on-chip

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

18-Mbit (512K x 36/1M x 18) Flow-Through SRAM

Functional Description [1] The CY7C1381D/CY7C1383D/CY7C1381F/CY7C1383F is a 3.3V, 512K x 36 and 1M x 18 synchronous flow through SRAMs, designed to interface with high-speed microprocessors with minimum glue logic. Maximum access delay from clock rise is 6.5 ns (133 MHz version). A 2-bit on-chip

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

18-Mbit (512K x 36/1M x 18) Flow-Through SRAM

Functional Description [1] The CY7C1381D/CY7C1383D/CY7C1381F/CY7C1383F is a 3.3V, 512K x 36 and 1M x 18 synchronous flow through SRAMs, designed to interface with high-speed microprocessors with minimum glue logic. Maximum access delay from clock rise is 6.5 ns (133 MHz version). A 2-bit on-chip

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

18-Mbit (512K x 36/1M x 18) Flow-Through SRAM

Functional Description [1] The CY7C1381D/CY7C1383D/CY7C1381F/CY7C1383F is a 3.3V, 512K x 36 and 1M x 18 synchronous flow through SRAMs, designed to interface with high-speed microprocessors with minimum glue logic. Maximum access delay from clock rise is 6.5 ns (133 MHz version). A 2-bit on-chip

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

18-Mbit (512K x 36/1M x 18) Flow-Through SRAM

Functional Description [1] The CY7C1381D/CY7C1383D/CY7C1381F/CY7C1383F is a 3.3V, 512K x 36 and 1M x 18 synchronous flow through SRAMs, designed to interface with high-speed microprocessors with minimum glue logic. Maximum access delay from clock rise is 6.5 ns (133 MHz version). A 2-bit on-chip

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

18-Mbit (512K x 36/1M x 18) Flow-Through SRAM

Functional Description [1] The CY7C1381D/CY7C1383D/CY7C1381F/CY7C1383F is a 3.3V, 512K x 36 and 1M x 18 synchronous flow through SRAMs, designed to interface with high-speed microprocessors with minimum glue logic. Maximum access delay from clock rise is 6.5 ns (133 MHz version). A 2-bit on-chip

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

18-Mbit (512K x 36/1M x 18) Flow-Through SRAM

Functional Description [1] The CY7C1381D/CY7C1383D/CY7C1381F/CY7C1383F is a 3.3V, 512K x 36 and 1M x 18 synchronous flow through SRAMs, designed to interface with high-speed microprocessors with minimum glue logic. Maximum access delay from clock rise is 6.5 ns (133 MHz version). A 2-bit on-chip

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

18-Mbit (512K x 36/1M x 18) Flow-Through SRAM

文件:1.22244 Mbytes Page:29 Pages

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

封装/外壳:100-LQFP 包装:托盘托盘 描述:IC SRAM 18MBIT PARALLEL 100TQFP 集成电路(IC) 存储器

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

18-Mbit (512K x 36/1M x 18) Flow-Through SRAM

文件:1.22244 Mbytes Page:29 Pages

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

18-Mbit (512K x 36/1M x 18) Flow-Through SRAM

文件:1.22244 Mbytes Page:29 Pages

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

18-Mbit (512K x 36/1M x 18) Flow-Through SRAM

文件:1.22244 Mbytes Page:29 Pages

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

18-Mbit (512K x 36/1M x 18) Flow-Through SRAM

文件:1.22244 Mbytes Page:29 Pages

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

18-Mbit (512K x 36/1M x 18) Flow-Through SRAM

文件:1.22244 Mbytes Page:29 Pages

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

18-Mbit (512K x 36/1M x 18) Flow-Through SRAM

文件:1.22244 Mbytes Page:29 Pages

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

18-Mbit (512 K x 36/1 M x 18) Flow-Through SRAM

文件:1.10335 Mbytes Page:37 Pages

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

封装/外壳:100-LQFP 包装:管件 描述:IC SRAM 18MBIT PARALLEL 100TQFP 集成电路(IC) 存储器

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

18-Mbit (512 K x 36/1 M x 18) Flow-Through SRAM

文件:1.10335 Mbytes Page:37 Pages

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

18-Mbit (512K x 36/1M x 18) Flow-Through SRAM

文件:1.22244 Mbytes Page:29 Pages

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

18-Mbit (512K x 36/1M x 18) Flow-Through SRAM

文件:1.22244 Mbytes Page:29 Pages

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

18-Mbit (512K x 36/1M x 18) Flow-Through SRAM

文件:1.22244 Mbytes Page:29 Pages

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

18-Mbit (512K x 36/1M x 18) Flow-Through SRAM

文件:1.22244 Mbytes Page:29 Pages

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

18-Mbit (512K x 36/1M x 18) Flow-Through SRAM

文件:1.22244 Mbytes Page:29 Pages

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

18-Mbit (512K x 36/1M x 18) Flow-Through SRAM

文件:1.20075 Mbytes Page:28 Pages

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

18-Mbit (512K x 36/1M x 18) Flow-Through SRAM

Infineon

英飞凌

18-Mbit (512K x 36/1M x 18) Flow-Through SRAM

文件:1.20075 Mbytes Page:28 Pages

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

18-Mbit (512K x 36/1M x 18) Flow-Through SRAM

文件:1.20075 Mbytes Page:28 Pages

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

18-Mbit (512K x 36/1M x 18) Flow-Through SRAM

文件:1.20075 Mbytes Page:28 Pages

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

18-Mbit (512K x 36/1M x 18) Flow-Through SRAM

文件:1.20075 Mbytes Page:28 Pages

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

18-Mbit (512K x 36/1M x 18) Flow-Through SRAM

文件:1.20075 Mbytes Page:28 Pages

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

18-Mbit (512K x 36/1M x 18) Flow-Through SRAM

文件:1.20075 Mbytes Page:28 Pages

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

18-Mbit (512K x 36/1M x 18) Flow-Through SRAM

文件:1.20075 Mbytes Page:28 Pages

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

18-Mbit (512K x 36/1M x 18) Flow-Through SRAM

文件:1.20075 Mbytes Page:28 Pages

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

18-Mbit (512K x 36/1M x 18) Flow-Through SRAM

文件:1.20075 Mbytes Page:28 Pages

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

18-Mbit (512K x 36/1M x 18) Flow-Through SRAM

文件:1.20075 Mbytes Page:28 Pages

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

18-Mbit (512K x 36/1M x 18) Flow-Through SRAM

文件:1.20075 Mbytes Page:28 Pages

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

18-Mbit (512K x 36/1M x 18) Flow-Through SRAM

文件:1.20075 Mbytes Page:28 Pages

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

512 횞 36/1M 횞 18 Flow-Thru SRAM

文件:599.35 Kbytes Page:31 Pages

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

18-Mb (512K x 36/1M x 18) Flow-Through SRAM

文件:564.61 Kbytes Page:36 Pages

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

CY7C1383D产品属性

  • 类型

    描述

  • 型号

    CY7C1383D

  • 功能描述

    IC SRAM 18MBIT 100MHZ 100LQFP

  • RoHS

  • 类别

    集成电路(IC) >> 存储器

  • 系列

    -

  • 标准包装

    96

  • 系列

    - 格式 -

  • 存储器

    闪存

  • 存储器类型

    FLASH

  • 存储容量

    16M(2M x 8,1M x 16)

  • 速度

    70ns

  • 接口

    并联

  • 电源电压

    2.65 V ~ 3.6 V

  • 工作温度

    -40°C ~ 85°C

  • 封装/外壳

    48-TFSOP(0.724,18.40mm 宽)

  • 供应商设备封装

    48-TSOP

  • 包装

    托盘

更新时间:2025-10-20 17:38:00
IC供应商 芯片型号 品牌 批号 封装 库存 备注 价格
CYPRESS
2016+
TQFP
3000
公司只做原装,假一赔十,可开17%增值税发票!
Cypress
24+
QFP
39500
进口原装现货 支持实单价优
CYPRESS/赛普拉斯
24+
NA
3000
只做原装正品现货 欢迎来电查询15919825718
CYPRESS/赛普拉斯
11+
TQFP100
29652
全新原装现货
CYPRESS
25+
TQFP100
580
原厂原装,价格优势
CYP
25+
72
4500
百分百原装正品 真实公司现货库存 本公司只做原装 可
Cypress(赛普拉斯)
21+
TQFP-100
30000
只做原装,质量保证
CYPRES
25+
QFP
4500
全新原装、诚信经营、公司现货销售!
Cypress(赛普拉斯)
23+
标准封装
6000
正规渠道,只有原装!
Cypress
24+
QFP100
125

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