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CY7C1381D价格

参考价格：￥80.7931

型号：CY7C1381D-100AXC 品牌：Cynergy 3 备注：这里有CY7C1381D多少钱，2025年最近7天走势，今日出价，今日竞价，CY7C1381D批发/采购报价，CY7C1381D行情走势销售排行榜，CY7C1381D报价。

型号	功能描述	生产厂家企业	LOGO
CY7C1381D	18-Mbit (512K x 36/1M x 18) Flow-Through SRAM Functional Description [1] The CY7C1381D/CY7C1383D/CY7C1381F/CY7C1383F is a 3.3V, 512K x 36 and 1M x 18 synchronous flow through SRAMs, designed to interface with high-speed microprocessors with minimum glue logic. Maximum access delay from clock rise is 6.5 ns (133 MHz version). A 2-bit on-chip	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1381D	18 Mbit (512 K 횞 36/1 M 횞 18) Flow Through SRAM 文件：1.15175 Mbytes Page：34 Pages	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1381D	18-Mbit (512 K x 36/1 M x 18) Flow-Through SRAM 文件：1.10335 Mbytes Page：37 Pages	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1381D	18-Mbit (512K x 36/1M x 18) Flow-Through SRAM 文件：1.22244 Mbytes Page：29 Pages	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1381D-100AXC	18-Mbit (512K x 36/1M x 18) Flow-Through SRAM Functional Description [1] The CY7C1381D/CY7C1383D/CY7C1381F/CY7C1383F is a 3.3V, 512K x 36 and 1M x 18 synchronous flow through SRAMs, designed to interface with high-speed microprocessors with minimum glue logic. Maximum access delay from clock rise is 6.5 ns (133 MHz version). A 2-bit on-chip	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1381D-100AXI	18-Mbit (512K x 36/1M x 18) Flow-Through SRAM Functional Description [1] The CY7C1381D/CY7C1383D/CY7C1381F/CY7C1383F is a 3.3V, 512K x 36 and 1M x 18 synchronous flow through SRAMs, designed to interface with high-speed microprocessors with minimum glue logic. Maximum access delay from clock rise is 6.5 ns (133 MHz version). A 2-bit on-chip	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1381D-100BGC	18-Mbit (512K x 36/1M x 18) Flow-Through SRAM Functional Description [1] The CY7C1381D/CY7C1383D/CY7C1381F/CY7C1383F is a 3.3V, 512K x 36 and 1M x 18 synchronous flow through SRAMs, designed to interface with high-speed microprocessors with minimum glue logic. Maximum access delay from clock rise is 6.5 ns (133 MHz version). A 2-bit on-chip	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1381D-100BGI	18-Mbit (512K x 36/1M x 18) Flow-Through SRAM Functional Description [1] The CY7C1381D/CY7C1383D/CY7C1381F/CY7C1383F is a 3.3V, 512K x 36 and 1M x 18 synchronous flow through SRAMs, designed to interface with high-speed microprocessors with minimum glue logic. Maximum access delay from clock rise is 6.5 ns (133 MHz version). A 2-bit on-chip	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1381D-100BGXC	18-Mbit (512K x 36/1M x 18) Flow-Through SRAM Functional Description [1] The CY7C1381D/CY7C1383D/CY7C1381F/CY7C1383F is a 3.3V, 512K x 36 and 1M x 18 synchronous flow through SRAMs, designed to interface with high-speed microprocessors with minimum glue logic. Maximum access delay from clock rise is 6.5 ns (133 MHz version). A 2-bit on-chip	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1381D-100BGXI	18-Mbit (512K x 36/1M x 18) Flow-Through SRAM Functional Description [1] The CY7C1381D/CY7C1383D/CY7C1381F/CY7C1383F is a 3.3V, 512K x 36 and 1M x 18 synchronous flow through SRAMs, designed to interface with high-speed microprocessors with minimum glue logic. Maximum access delay from clock rise is 6.5 ns (133 MHz version). A 2-bit on-chip	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1381D-100BZC	18-Mbit (512K x 36/1M x 18) Flow-Through SRAM Functional Description [1] The CY7C1381D/CY7C1383D/CY7C1381F/CY7C1383F is a 3.3V, 512K x 36 and 1M x 18 synchronous flow through SRAMs, designed to interface with high-speed microprocessors with minimum glue logic. Maximum access delay from clock rise is 6.5 ns (133 MHz version). A 2-bit on-chip	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1381D-100BZI	18-Mbit (512K x 36/1M x 18) Flow-Through SRAM Functional Description [1] The CY7C1381D/CY7C1383D/CY7C1381F/CY7C1383F is a 3.3V, 512K x 36 and 1M x 18 synchronous flow through SRAMs, designed to interface with high-speed microprocessors with minimum glue logic. Maximum access delay from clock rise is 6.5 ns (133 MHz version). A 2-bit on-chip	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1381D-100BZXC	18-Mbit (512K x 36/1M x 18) Flow-Through SRAM Functional Description [1] The CY7C1381D/CY7C1383D/CY7C1381F/CY7C1383F is a 3.3V, 512K x 36 and 1M x 18 synchronous flow through SRAMs, designed to interface with high-speed microprocessors with minimum glue logic. Maximum access delay from clock rise is 6.5 ns (133 MHz version). A 2-bit on-chip	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1381D-100BZXI	18-Mbit (512K x 36/1M x 18) Flow-Through SRAM Functional Description [1] The CY7C1381D/CY7C1383D/CY7C1381F/CY7C1383F is a 3.3V, 512K x 36 and 1M x 18 synchronous flow through SRAMs, designed to interface with high-speed microprocessors with minimum glue logic. Maximum access delay from clock rise is 6.5 ns (133 MHz version). A 2-bit on-chip	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1381D-133AXC	18-Mbit (512K x 36/1M x 18) Flow-Through SRAM Functional Description [1] The CY7C1381D/CY7C1383D/CY7C1381F/CY7C1383F is a 3.3V, 512K x 36 and 1M x 18 synchronous flow through SRAMs, designed to interface with high-speed microprocessors with minimum glue logic. Maximum access delay from clock rise is 6.5 ns (133 MHz version). A 2-bit on-chip	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1381D-133BGC	18-Mbit (512K x 36/1M x 18) Flow-Through SRAM Functional Description [1] The CY7C1381D/CY7C1383D/CY7C1381F/CY7C1383F is a 3.3V, 512K x 36 and 1M x 18 synchronous flow through SRAMs, designed to interface with high-speed microprocessors with minimum glue logic. Maximum access delay from clock rise is 6.5 ns (133 MHz version). A 2-bit on-chip	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1381D-133BGXC	18-Mbit (512K x 36/1M x 18) Flow-Through SRAM Functional Description [1] The CY7C1381D/CY7C1383D/CY7C1381F/CY7C1383F is a 3.3V, 512K x 36 and 1M x 18 synchronous flow through SRAMs, designed to interface with high-speed microprocessors with minimum glue logic. Maximum access delay from clock rise is 6.5 ns (133 MHz version). A 2-bit on-chip	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1381D-133BZC	18-Mbit (512K x 36/1M x 18) Flow-Through SRAM Functional Description [1] The CY7C1381D/CY7C1383D/CY7C1381F/CY7C1383F is a 3.3V, 512K x 36 and 1M x 18 synchronous flow through SRAMs, designed to interface with high-speed microprocessors with minimum glue logic. Maximum access delay from clock rise is 6.5 ns (133 MHz version). A 2-bit on-chip	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1381D-133BZXC	18-Mbit (512K x 36/1M x 18) Flow-Through SRAM Functional Description [1] The CY7C1381D/CY7C1383D/CY7C1381F/CY7C1383F is a 3.3V, 512K x 36 and 1M x 18 synchronous flow through SRAMs, designed to interface with high-speed microprocessors with minimum glue logic. Maximum access delay from clock rise is 6.5 ns (133 MHz version). A 2-bit on-chip	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1381D_07	18-Mbit (512K x 36/1M x 18) Flow-Through SRAM 文件：1.22244 Mbytes Page：29 Pages	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1381D_11	18 Mbit (512 K 횞 36/1 M 횞 18) Flow Through SRAM 文件：1.15175 Mbytes Page：34 Pages	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1381D_13	18-Mbit (512 K x 36/1 M x 18) Flow-Through SRAM 文件：1.10335 Mbytes Page：37 Pages	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1381D-100AXC	18-Mbit (512 K x 36/1 M x 18) Flow-Through SRAM 文件：1.10335 Mbytes Page：37 Pages	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1381D-100AXC	18 Mbit (512 K 횞 36/1 M 횞 18) Flow Through SRAM 文件：1.15175 Mbytes Page：34 Pages	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1381D-100AXC	18-Mbit (512K x 36/1M x 18) Flow-Through SRAM 文件：1.22244 Mbytes Page：29 Pages	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1381D-100AXCT	封装/外壳：100-LQFP 包装：托盘托盘描述：IC SRAM 18MBIT PARALLEL 100TQFP 集成电路（IC）存储器	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1381D-100AXI	18-Mbit (512K x 36/1M x 18) Flow-Through SRAM 文件：1.22244 Mbytes Page：29 Pages	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1381D-100BZC	18-Mbit (512K x 36/1M x 18) Flow-Through SRAM 文件：1.22244 Mbytes Page：29 Pages	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1381D-100BZC	封装/外壳：165-LBGA 包装：托盘描述：IC SRAM 18MBIT PARALLEL 165FBGA 集成电路（IC）存储器	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1381D-100BZI	18-Mbit (512 K x 36/1 M x 18) Flow-Through SRAM 文件：1.10335 Mbytes Page：37 Pages	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1381D-100BZI	18-Mbit (512K x 36/1M x 18) Flow-Through SRAM 文件：1.22244 Mbytes Page：29 Pages	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1381D-100BZI	18 Mbit (512 K 횞 36/1 M 횞 18) Flow Through SRAM 文件：1.15175 Mbytes Page：34 Pages	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1381D-100BZXC	18-Mbit (512K x 36/1M x 18) Flow-Through SRAM 文件：1.22244 Mbytes Page：29 Pages	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1381D-100BZXI	18-Mbit (512K x 36/1M x 18) Flow-Through SRAM 文件：1.22244 Mbytes Page：29 Pages	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1381D-100BZXI	18 Mbit (512 K 횞 36/1 M 횞 18) Flow Through SRAM 文件：1.15175 Mbytes Page：34 Pages	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1381D-100BZXI	18-Mbit (512 K x 36/1 M x 18) Flow-Through SRAM 文件：1.10335 Mbytes Page：37 Pages	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1381D-133AXC	18 Mbit (512 K 횞 36/1 M 횞 18) Flow Through SRAM 文件：1.15175 Mbytes Page：34 Pages	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1381D-133AXC	18-Mbit (512 K x 36/1 M x 18) Flow-Through SRAM 文件：1.10335 Mbytes Page：37 Pages	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1381D-133AXC	静态随机存取存储器(SRAM)	ETC 知名厂家	ETC
CY7C1381D-133AXC	18-Mbit (512K x 36/1M x 18) Flow-Through SRAM 文件：1.22244 Mbytes Page：29 Pages	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1381D-133AXI	18-Mbit (512 K x 36/1 M x 18) Flow-Through SRAM 文件：1.10335 Mbytes Page：37 Pages	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1381D-133AXI	18-Mbit (512K x 36/1M x 18) Flow-Through SRAM 文件：1.22244 Mbytes Page：29 Pages	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1381D-133AXI	18 Mbit (512 K 횞 36/1 M 횞 18) Flow Through SRAM 文件：1.15175 Mbytes Page：34 Pages	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1381D-133AXIT	IC SRAM 18M PARALLEL 100TQFP	Infineon 英飞凌	Infineon
CY7C1381D-133BGXC	IC SRAM 18M PARALLEL 165FBGA	Infineon 英飞凌	Infineon
CY7C1381D-133BZC	18-Mbit (512K x 36/1M x 18) Flow-Through SRAM 文件：1.22244 Mbytes Page：29 Pages	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1381D-133BZI	18-Mbit (512K x 36/1M x 18) Flow-Through SRAM 文件：1.22244 Mbytes Page：29 Pages	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1381D-133BZXC	18-Mbit (512K x 36/1M x 18) Flow-Through SRAM 文件：1.22244 Mbytes Page：29 Pages	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1381D-133BZXI	18-Mbit (512K x 36/1M x 18) Flow-Through SRAM 文件：1.22244 Mbytes Page：29 Pages	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1381DV25	18-Mbit (512K x 36/1M x 18) Flow-Through SRAM 文件：1.20075 Mbytes Page：28 Pages	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1381DV25-100AXC	18-Mbit (512K x 36/1M x 18) Flow-Through SRAM 文件：1.20075 Mbytes Page：28 Pages	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1381DV25-100AXI	18-Mbit (512K x 36/1M x 18) Flow-Through SRAM 文件：1.20075 Mbytes Page：28 Pages	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1381DV25-100BZC	18-Mbit (512K x 36/1M x 18) Flow-Through SRAM 文件：1.20075 Mbytes Page：28 Pages	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1381DV25-100BZI	18-Mbit (512K x 36/1M x 18) Flow-Through SRAM 文件：1.20075 Mbytes Page：28 Pages	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1381DV25-100BZXC	18-Mbit (512K x 36/1M x 18) Flow-Through SRAM 文件：1.20075 Mbytes Page：28 Pages	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1381DV25-100BZXI	18-Mbit (512K x 36/1M x 18) Flow-Through SRAM 文件：1.20075 Mbytes Page：28 Pages	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1381DV25-133AXC	18-Mbit (512K x 36/1M x 18) Flow-Through SRAM 文件：1.20075 Mbytes Page：28 Pages	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1381DV25-133AXI	18-Mbit (512K x 36/1M x 18) Flow-Through SRAM 文件：1.20075 Mbytes Page：28 Pages	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1381DV25-133BZC	18-Mbit (512K x 36/1M x 18) Flow-Through SRAM 文件：1.20075 Mbytes Page：28 Pages	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress
CY7C1381DV25-133BZI	18-Mbit (512K x 36/1M x 18) Flow-Through SRAM 文件：1.20075 Mbytes Page：28 Pages	CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司	Cypress

CY7C1381D产品属性

类型
描述
型号
CY7C1381D
功能描述
静态随机存取存储器 512Kx36 3.3V COM Sync FT 静态随机存取存储器
RoHS
否
制造商
Cypress Semiconductor
存储容量
16 Mbit
组织
1 M x 16
访问时间
55 ns
电源电压-最大
3.6 V
电源电压-最小
2.2 V
最大工作电流
22 uA
最大工作温度
+ 85 C
最小工作温度
- 40 C
安装风格
SMD/SMT
封装/箱体
TSOP-48
封装
Tray

CY7C1381D供应商更多...

更新时间：2025-12-17 23:00:00

IC供应商	芯片型号	品牌	批号	封装	库存	备注	价格
深圳市高捷芯城科技有限公司	CY7C1381D-100BZXI	CYPRESS(赛普拉斯)	24+	LBGA165	7350	现货供应,当天可交货!免费送样,原厂技术支持!!!	询价
深圳市正迈科技有限公司	CY7C1381D-100AXC	CY	23+	NA	3200	专业电子元器件供应链正迈科技特价代理特价，原装元器件供应，支持开发样品	询价
深圳市英卓尔科技有限公司	CY7C1381D-133AXI	CYPRESS	20+	QFP	500	样品可出,优势库存欢迎实单	询价
谛辉(北京/上海/青岛 )电子科技有限公司	CY7C1381D-133AXC	CYPRESS	25+	DIP-16	18000	原厂直接发货进口原装	询价
深圳市华康联电子科技有限公司	CY7C1381D-133AXI	CYPRESS/赛普拉斯	23+	QFP-100	98900	原厂原装正品现货!!	询价
深圳市科恒伟业电子有限公司	CY7C1381D-100AXC	CYPRESS/赛普拉斯	2450+	QFP	8850	只做原装正品假一赔十为客户做到零风险!!	询价
深圳市得捷芯城科技有限公司	CY7C1381D-133AXC	Cypress(赛普拉斯)	24+	100-LQFP	67048	原厂可订货,技术支持,直接渠道。可签保供合同	询价
深圳市富利微电子科技有限公司	CY7C1381D-100AXC	CYPRESS/赛普拉斯	24+	QFP	30000	房间原装现货特价热卖,有单详谈	询价
贸泽芯城（深圳）电子科技有限公司	CY7C1381D-100BZI	CYPRESS/赛普拉斯	23+	BGA	3000	一级代理原厂VIP渠道,专注军工、汽车、医疗、工业、	询价
深圳市勤思达科技有限公司	CY7C1381D-133AXI	CYPRESS	24+	N/A	8000	全新原装正品,现货销售	询价

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CY7C1370D-167AXI产品资料
2020-6-28
CY7C1350G-133AXC公司原装现货/长期供应
全新原装
2019-3-30
CY7C1354C-166AXI公司原装现货/长期供应
全新原装
2019-3-30

DdatasheetPDF页码索引

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DdatasheetPDF页码索引