512K x 36/1M x 18 Pipelined SRAM

Functional Description The Cypress Synchronous Burst SRAM family employs high speed, low-power CMOS designs using advanced single-layer polysilicon, triple-layer metal technology. Each memory cell consists of six transistors. Features • Fast clock speed: 250, 225, 200, 167 MHz • Provide high-p

18-Mbit (512K x 36/1M x 18) Pipelined SRAM

文件：510.23 Kbytes Page：33 Pages

512K x 36/1M x 18 Pipelined SRAM

Functional Description The Cypress Synchronous Burst SRAM family employs high speed, low-power CMOS designs using advanced single-layer polysilicon, triple-layer metal technology. Each memory cell consists of six transistors. Features • Fast clock speed: 250, 225, 200, 167 MHz • Provide high-p

512K x 36/1M x 18 Pipelined SRAM

Functional Description The Cypress Synchronous Burst SRAM family employs high speed, low-power CMOS designs using advanced single-layer polysilicon, triple-layer metal technology. Each memory cell consists of six transistors. Features • Fast clock speed: 250, 225, 200, 167 MHz • Provide high-p

18-Mbit (512K x 36/1M x 18) Pipelined SRAM

文件：510.23 Kbytes Page：33 Pages