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CY7C1373D价格
参考价格：￥136.7982
型号：CY7C1373D-100AXC 品牌：Cynergy 3 备注：这里有CY7C1373D多少钱，2025年最近7天走势，今日出价，今日竞价，CY7C1373D批发/采购报价，CY7C1373D行情走势销售排行榜，CY7C1373D报价。| 型号 | 功能描述 | 生产厂家 企业 | LOGO | 操作 |
|---|---|---|---|---|
CY7C1373D | 18-Mbit (512K x 36/1M x 18) Flow-Through SRAM with NoBLTM Architecture Functional Description[1] The CY7C1371D/CY7C1373D is a 3.3V, 512K x 36/1 Mbit x 18 Synchronous Flow-through Burst SRAM designed specifically to support unlimited true back-to-back Read/Write operations without the insertion of wait states. The CY7C1371D/ CY7C1373D is equipped with the advanced No | CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司 |   | |
CY7C1373D | 18-Mbit (512K x 36/1M x 18) Flow-Through SRAM with NoBL??Architecture 文件：1.01162 Mbytes Page：29 Pages | CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司 | | |
18-Mbit (512K x 36/1M x 18) Flow-Through SRAM with NoBLTM Architecture Functional Description[1] The CY7C1371D/CY7C1373D is a 3.3V, 512K x 36/1 Mbit x 18 Synchronous Flow-through Burst SRAM designed specifically to support unlimited true back-to-back Read/Write operations without the insertion of wait states. The CY7C1371D/ CY7C1373D is equipped with the advanced No | CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司 | | ||
18-Mbit (512K x 36/1M x 18) Flow-Through SRAM with NoBLTM Architecture Functional Description[1] The CY7C1371D/CY7C1373D is a 3.3V, 512K x 36/1 Mbit x 18 Synchronous Flow-through Burst SRAM designed specifically to support unlimited true back-to-back Read/Write operations without the insertion of wait states. The CY7C1371D/ CY7C1373D is equipped with the advanced No | CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司 | | ||
18-Mbit (512K x 36/1M x 18) Flow-Through SRAM with NoBLTM Architecture Functional Description[1] The CY7C1371D/CY7C1373D is a 3.3V, 512K x 36/1 Mbit x 18 Synchronous Flow-through Burst SRAM designed specifically to support unlimited true back-to-back Read/Write operations without the insertion of wait states. The CY7C1371D/ CY7C1373D is equipped with the advanced No | CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司 | | ||
18-Mbit (512K x 36/1M x 18) Flow-Through SRAM with NoBLTM Architecture Functional Description[1] The CY7C1371D/CY7C1373D is a 3.3V, 512K x 36/1 Mbit x 18 Synchronous Flow-through Burst SRAM designed specifically to support unlimited true back-to-back Read/Write operations without the insertion of wait states. The CY7C1371D/ CY7C1373D is equipped with the advanced No | CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司 | | ||
18-Mbit (512K x 36/1M x 18) Flow-Through SRAM with NoBLTM Architecture Functional Description[1] The CY7C1371D/CY7C1373D is a 3.3V, 512K x 36/1 Mbit x 18 Synchronous Flow-through Burst SRAM designed specifically to support unlimited true back-to-back Read/Write operations without the insertion of wait states. The CY7C1371D/ CY7C1373D is equipped with the advanced No | CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司 | | ||
18-Mbit (512K x 36/1M x 18) Flow-Through SRAM with NoBLTM Architecture Functional Description[1] The CY7C1371D/CY7C1373D is a 3.3V, 512K x 36/1 Mbit x 18 Synchronous Flow-through Burst SRAM designed specifically to support unlimited true back-to-back Read/Write operations without the insertion of wait states. The CY7C1371D/ CY7C1373D is equipped with the advanced No | CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司 | | ||
18-Mbit (512K x 36/1M x 18) Flow-Through SRAM with NoBLTM Architecture Functional Description[1] The CY7C1371D/CY7C1373D is a 3.3V, 512K x 36/1 Mbit x 18 Synchronous Flow-through Burst SRAM designed specifically to support unlimited true back-to-back Read/Write operations without the insertion of wait states. The CY7C1371D/ CY7C1373D is equipped with the advanced No | CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司 | | ||
18-Mbit (512K x 36/1M x 18) Flow-Through SRAM with NoBLTM Architecture Functional Description[1] The CY7C1371D/CY7C1373D is a 3.3V, 512K x 36/1 Mbit x 18 Synchronous Flow-through Burst SRAM designed specifically to support unlimited true back-to-back Read/Write operations without the insertion of wait states. The CY7C1371D/ CY7C1373D is equipped with the advanced No | CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司 | | ||
18-Mbit (512K x 36/1M x 18) Flow-Through SRAM with NoBLTM Architecture Functional Description[1] The CY7C1371D/CY7C1373D is a 3.3V, 512K x 36/1 Mbit x 18 Synchronous Flow-through Burst SRAM designed specifically to support unlimited true back-to-back Read/Write operations without the insertion of wait states. The CY7C1371D/ CY7C1373D is equipped with the advanced No | CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司 | | ||
18-Mbit (512K x 36/1M x 18) Flow-Through SRAM with NoBLTM Architecture Functional Description[1] The CY7C1371D/CY7C1373D is a 3.3V, 512K x 36/1 Mbit x 18 Synchronous Flow-through Burst SRAM designed specifically to support unlimited true back-to-back Read/Write operations without the insertion of wait states. The CY7C1371D/ CY7C1373D is equipped with the advanced No | CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司 | | ||
18-Mbit (512K x 36/1M x 18) Flow-Through SRAM with NoBLTM Architecture Functional Description[1] The CY7C1371D/CY7C1373D is a 3.3V, 512K x 36/1 Mbit x 18 Synchronous Flow-through Burst SRAM designed specifically to support unlimited true back-to-back Read/Write operations without the insertion of wait states. The CY7C1371D/ CY7C1373D is equipped with the advanced No | CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司 | | ||
18-Mbit (512K x 36/1M x 18) Flow-Through SRAM with NoBLTM Architecture Functional Description[1] The CY7C1371D/CY7C1373D is a 3.3V, 512K x 36/1 Mbit x 18 Synchronous Flow-through Burst SRAM designed specifically to support unlimited true back-to-back Read/Write operations without the insertion of wait states. The CY7C1371D/ CY7C1373D is equipped with the advanced No | CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司 | | ||
18-Mbit (512K x 36/1M x 18) Flow-Through SRAM with NoBLTM Architecture Functional Description[1] The CY7C1371D/CY7C1373D is a 3.3V, 512K x 36/1 Mbit x 18 Synchronous Flow-through Burst SRAM designed specifically to support unlimited true back-to-back Read/Write operations without the insertion of wait states. The CY7C1371D/ CY7C1373D is equipped with the advanced No | CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司 | | ||
18-Mbit (512K x 36/1M x 18) Flow-Through SRAM with NoBLTM Architecture Functional Description[1] The CY7C1371D/CY7C1373D is a 3.3V, 512K x 36/1 Mbit x 18 Synchronous Flow-through Burst SRAM designed specifically to support unlimited true back-to-back Read/Write operations without the insertion of wait states. The CY7C1371D/ CY7C1373D is equipped with the advanced No | CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司 | | ||
18-Mbit (512K x 36/1M x 18) Flow-Through SRAM with NoBLTM Architecture Functional Description[1] The CY7C1371D/CY7C1373D is a 3.3V, 512K x 36/1 Mbit x 18 Synchronous Flow-through Burst SRAM designed specifically to support unlimited true back-to-back Read/Write operations without the insertion of wait states. The CY7C1371D/ CY7C1373D is equipped with the advanced No | CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司 | | ||
18-Mbit (512K x 36/1M x 18) Flow-Through SRAM with NoBLTM Architecture Functional Description[1] The CY7C1371D/CY7C1373D is a 3.3V, 512K x 36/1 Mbit x 18 Synchronous Flow-through Burst SRAM designed specifically to support unlimited true back-to-back Read/Write operations without the insertion of wait states. The CY7C1371D/ CY7C1373D is equipped with the advanced No | CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司 | | ||
18-Mbit (512K x 36/1M x 18) Flow-Through SRAM with NoBLTM Architecture Functional Description[1] The CY7C1371D/CY7C1373D is a 3.3V, 512K x 36/1 Mbit x 18 Synchronous Flow-through Burst SRAM designed specifically to support unlimited true back-to-back Read/Write operations without the insertion of wait states. The CY7C1371D/ CY7C1373D is equipped with the advanced No | CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司 | | ||
18-Mbit (512K x 36/1M x 18) Flow-Through SRAM with NoBLTM Architecture Functional Description[1] The CY7C1371D/CY7C1373D is a 3.3V, 512K x 36/1 Mbit x 18 Synchronous Flow-through Burst SRAM designed specifically to support unlimited true back-to-back Read/Write operations without the insertion of wait states. The CY7C1371D/ CY7C1373D is equipped with the advanced No | CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司 | | ||
18-Mbit (512 K 횞 36/1 M 횞 18) Flow-Through SRAM with NoBL??Architecture 文件：1.07276 Mbytes Page：37 Pages | CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司 | | ||
18-Mbit (512K x 36/1M x 18) Flow-Through SRAM with NoBL??Architecture 文件：1.01162 Mbytes Page：29 Pages | CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司 | | ||
封装/外壳：100-LQFP 包装：托盘托盘 描述：IC SRAM 18MBIT PARALLEL 100TQFP 集成电路（IC） 存储器 | CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司 | | ||
18-Mbit (512K x 36/1M x 18) Flow-Through SRAM with NoBL??Architecture 文件：1.01162 Mbytes Page：29 Pages | CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司 | | ||
18-Mbit (512K x 36/1M x 18) Flow-Through SRAM with NoBL??Architecture 文件：1.01162 Mbytes Page：29 Pages | CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司 | | ||
18-Mbit (512K x 36/1M x 18) Flow-Through SRAM with NoBL??Architecture 文件：1.01162 Mbytes Page：29 Pages | CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司 | | ||
18-Mbit (512K x 36/1M x 18) Flow-Through SRAM with NoBL??Architecture 文件：1.01162 Mbytes Page：29 Pages | CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司 | | ||
18-Mbit (512K x 36/1M x 18) Flow-Through SRAM with NoBL??Architecture 文件：1.01162 Mbytes Page：29 Pages | CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司 | | ||
18-Mbit (512K x 36/1M x 18) Flow-Through SRAM with NoBL??Architecture 文件：1.01162 Mbytes Page：29 Pages | CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司 | | ||
18-Mbit (512K x 36/1M x 18) Flow-Through SRAM with NoBL??Architecture 文件：1.01162 Mbytes Page：29 Pages | CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司 | | ||
18-Mbit (512K x 36/1M x 18) Flow-Through SRAM with NoBL??Architecture 文件：1.01162 Mbytes Page：29 Pages | CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司 | | ||
18-Mbit (512K x 36/1M x 18) Flow-Through SRAM with NoBL??Architecture 文件：1.01162 Mbytes Page：29 Pages | CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司 | | ||
18-Mbit (512K x 36/1M x 18) Flow-Through SRAM with NoBL??Architecture 文件：1.01162 Mbytes Page：29 Pages | CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司 | | ||
18-Mbit (512K x 36/1M x 18) Flow-Through SRAM with NoBL??Architecture 文件：1.01162 Mbytes Page：29 Pages | CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司 | | ||
18-Mbit (512 K 횞 36/1 M 횞 18) Flow-Through SRAM with NoBL??Architecture 文件：1.07276 Mbytes Page：37 Pages | CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司 | | ||
封装/外壳：100-LQFP 包装：托盘 描述：IC SRAM 18MBIT PARALLEL 100TQFP 集成电路（IC） 存储器 | CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司 | | ||
18-Mbit (512K x 36/1M x 18) Flow-Through SRAM with NoBL??Architecture 文件：1.01162 Mbytes Page：29 Pages | CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司 | | ||
18-Mbit (512K x 36/1M x 18) Flow-Through SRAM with NoBL??Architecture 文件：1.01162 Mbytes Page：29 Pages | CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司 | | ||
18-Mbit (512K x 36/1M x 18) Flow-Through SRAM with NoBL??Architecture 文件：1.01162 Mbytes Page：29 Pages | CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司 | | ||
18-Mbit (512K x 36/1M x 18) Flow-Through SRAM with NoBL??Architecture 文件：1.01162 Mbytes Page：29 Pages | CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司 | | ||
18-Mbit (512K x 36/1M x 18) Flow-Through SRAM with NoBL??Architecture 文件：1.01162 Mbytes Page：29 Pages | CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司 | | ||
18-Mbit (512K x 36/1M x 18) Flow-Through SRAM with NoBL??Architecture 文件：1.01162 Mbytes Page：29 Pages | CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司 | | ||
18-Mbit (512 K 횞 36/1 M 횞 18) Flow-Through SRAM with NoBL??Architecture 文件：1.07276 Mbytes Page：37 Pages | CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司 | | ||
18-Mbit (512K x 36/1M x 18) Flow-Through SRAM with NoBL??Architecture 文件：1.01162 Mbytes Page：29 Pages | CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司 | | ||
18-Mbit (512K x 36/1M x 18) Flow-Through SRAM with NoBL??Architecture 文件：1.01162 Mbytes Page：29 Pages | CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司 | | ||
18-Mbit (512K x 36/1M x 18) Flow-Through SRAM with NoBL??Architecture 文件：444.2 Kbytes Page：28 Pages | CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司 | | ||
18-Mbit (512K x 36/1M x 18) Flow-Through SRAM with NoBL™ Architecture | Infineon 英飞凌 | | ||
18-Mbit (512K x 36/1M x 18) Flow-Through SRAM with NoBL??Architecture 文件：444.2 Kbytes Page：28 Pages | CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司 | | ||
18-Mbit (512K x 36/1M x 18) Flow-Through SRAM with NoBL??Architecture 文件：444.2 Kbytes Page：28 Pages | CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司 | | ||
18-Mbit (512K x 36/1M x 18) Flow-Through SRAM with NoBL??Architecture 文件：444.2 Kbytes Page：28 Pages | CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司 | | ||
18-Mbit (512K x 36/1M x 18) Flow-Through SRAM with NoBL??Architecture 文件：444.2 Kbytes Page：28 Pages | CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司 | | ||
18-Mbit (512K x 36/1M x 18) Flow-Through SRAM with NoBL??Architecture 文件：444.2 Kbytes Page：28 Pages | CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司 | | ||
18-Mbit (512K x 36/1M x 18) Flow-Through SRAM with NoBL??Architecture 文件：444.2 Kbytes Page：28 Pages | CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司 | | ||
18-Mbit (512K x 36/1M x 18) Flow-Through SRAM with NoBL??Architecture 文件：444.2 Kbytes Page：28 Pages | CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司 | | ||
18-Mbit (512K x 36/1M x 18) Flow-Through SRAM with NoBL??Architecture 文件：444.2 Kbytes Page：28 Pages | CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司 | | ||
18-Mbit (512K x 36/1M x 18) Flow-Through SRAM with NoBL??Architecture 文件：444.2 Kbytes Page：28 Pages | CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司 | | ||
18-Mbit (512K x 36/1M x 18) Flow-Through SRAM with NoBL??Architecture 文件：444.2 Kbytes Page：28 Pages | CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司 | | ||
18-Mbit (512K x 36/1M x 18) Flow-Through SRAM with NoBL??Architecture 文件：444.2 Kbytes Page：28 Pages | CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司 | | ||
18-Mbit (512K x 36/1M x 18) Flow-Through SRAM with NoBL??Architecture 文件：444.2 Kbytes Page：28 Pages | CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司 | | ||
18-Mbit (512K x 36/1M x 18) Flow-Through SRAM with NoBL??Architecture 文件：444.2 Kbytes Page：28 Pages | CypressCypress Semiconductor 赛普拉斯赛普拉斯半导体公司 | |
CY7C1373D产品属性
- 类型
描述
- 型号
CY7C1373D
- 功能描述
静态随机存取存储器 1Mx18 3.3V NoBL Sync PL 静态随机存取存储器 COM
- RoHS
否
- 制造商
Cypress Semiconductor
- 存储容量
16 Mbit
- 组织
1 M x 16
- 访问时间
55 ns
- 电源电压-最大
3.6 V
- 电源电压-最小
2.2 V
- 最大工作电流
22 uA
- 最大工作温度
+ 85 C
- 最小工作温度
- 40 C
- 安装风格
SMD/SMT
- 封装/箱体
TSOP-48
- 封装
Tray
| IC供应商 | 芯片型号 | 品牌 | 批号 | 封装 | 库存 | 备注 | 价格 |
|---|---|---|---|---|---|---|---|
Cypress Semiconductor Corp |
21+ |
165-TBGA |
5280 |
进口原装!长期供应!绝对优势价格(诚信经营 |
|||
Cypress Semiconductor |
两年内 |
NA |
1765 |
实单价格可谈 |
|||
CYPRESS/赛普拉斯 |
24+ |
NA/ |
3267 |
原装现货,当天可交货,原型号开票 |
|||
CYPRESS(赛普拉斯) |
24+ |
LBGA165 |
7350 |
现货供应,当天可交货!免费送样,原厂技术支持!!! |
|||
CYPRESS/赛普拉斯 |
24+ |
BGA-165 |
27740 |
只做原装 公司现货库存 |
|||
CYPRESS/赛普拉斯 |
25+ |
BGA-165 |
996880 |
只做原装,欢迎来电资询 |
|||
CY |
23+ |
NA |
3200 |
专业电子元器件供应链正迈科技特价代理特价，原装元器件供应，支持开发样品 |
|||
CYPRE |
20+ |
QFP-100 |
500 |
样品可出,优势库存欢迎实单 |
|||
Cypress |
23+ |
100-TQFP(14x20) |
1389 |
专业分销产品!原装正品!价格优势! |
|||
CYPRESS/赛普拉斯 |
23+ |
BGA-165 |
98900 |
原厂原装正品现货!! |
CY7C1373D芯片相关品牌
CY7C1373D规格书下载地址
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CY7C1373D数据表相关新闻
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CY7C1462AV33-167AXC 可做含税，支持实单
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CY7C1399B-12ZC CY7C1399B-12ZC，ALTERA（阿尔特拉），军工级IC专业优势渠道
2020-7-16CY7C1399B-12ZC十年IC，一家专业军工级IC供货商
CY7C1399B-12ZC十年IC，一家专业军工级IC供货商
2020-7-15CY7C1370D-167AXI产品资料 CYPRESS/赛普拉斯
CY7C1370D-167AXI产品资料
2020-6-28CY7C1350G-133AXC公司原装现货/长期供应
全新原装
2019-3-30CY7C1354C-166AXI公司原装现货/长期供应
全新原装
2019-3-30
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