CY7C1371D价格

参考价格:¥115.2244

型号:CY7C1371D-100AXC 品牌:CYPRESS 备注:这里有CY7C1371D多少钱,2024年最近7天走势,今日出价,今日竞价,CY7C1371D批发/采购报价,CY7C1371D行情走势销售排行榜,CY7C1371D报价。
型号 功能描述 生产厂家&企业 LOGO 操作
CY7C1371D

18-Mbit(512Kx36/1Mx18)Flow-ThroughSRAMwithNoBLTMArchitecture

FunctionalDescription[1] TheCY7C1371D/CY7C1373Disa3.3V,512Kx36/1Mbitx18SynchronousFlow-throughBurstSRAMdesignedspecificallytosupportunlimitedtrueback-to-backRead/Writeoperationswithouttheinsertionofwaitstates.TheCY7C1371D/CY7C1373DisequippedwiththeadvancedNo

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

Cypress
CY7C1371D

18-Mbit(512Kx36/1Mx18)Flow-ThroughSRAMwithNoBL??Architecture

文件:1.01162 Mbytes Page:29 Pages

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

Cypress

18-Mbit(512Kx36/1Mx18)Flow-ThroughSRAMwithNoBLTMArchitecture

FunctionalDescription[1] TheCY7C1371D/CY7C1373Disa3.3V,512Kx36/1Mbitx18SynchronousFlow-throughBurstSRAMdesignedspecificallytosupportunlimitedtrueback-to-backRead/Writeoperationswithouttheinsertionofwaitstates.TheCY7C1371D/CY7C1373DisequippedwiththeadvancedNo

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

Cypress

18-Mbit(512Kx36/1Mx18)Flow-ThroughSRAMwithNoBLTMArchitecture

FunctionalDescription[1] TheCY7C1371D/CY7C1373Disa3.3V,512Kx36/1Mbitx18SynchronousFlow-throughBurstSRAMdesignedspecificallytosupportunlimitedtrueback-to-backRead/Writeoperationswithouttheinsertionofwaitstates.TheCY7C1371D/CY7C1373DisequippedwiththeadvancedNo

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

Cypress

18-Mbit(512Kx36/1Mx18)Flow-ThroughSRAMwithNoBLTMArchitecture

FunctionalDescription[1] TheCY7C1371D/CY7C1373Disa3.3V,512Kx36/1Mbitx18SynchronousFlow-throughBurstSRAMdesignedspecificallytosupportunlimitedtrueback-to-backRead/Writeoperationswithouttheinsertionofwaitstates.TheCY7C1371D/CY7C1373DisequippedwiththeadvancedNo

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

Cypress

18-Mbit(512Kx36/1Mx18)Flow-ThroughSRAMwithNoBLTMArchitecture

FunctionalDescription[1] TheCY7C1371D/CY7C1373Disa3.3V,512Kx36/1Mbitx18SynchronousFlow-throughBurstSRAMdesignedspecificallytosupportunlimitedtrueback-to-backRead/Writeoperationswithouttheinsertionofwaitstates.TheCY7C1371D/CY7C1373DisequippedwiththeadvancedNo

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

Cypress

18-Mbit(512Kx36/1Mx18)Flow-ThroughSRAMwithNoBLTMArchitecture

FunctionalDescription[1] TheCY7C1371D/CY7C1373Disa3.3V,512Kx36/1Mbitx18SynchronousFlow-throughBurstSRAMdesignedspecificallytosupportunlimitedtrueback-to-backRead/Writeoperationswithouttheinsertionofwaitstates.TheCY7C1371D/CY7C1373DisequippedwiththeadvancedNo

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

Cypress

18-Mbit(512Kx36/1Mx18)Flow-ThroughSRAMwithNoBLTMArchitecture

FunctionalDescription[1] TheCY7C1371D/CY7C1373Disa3.3V,512Kx36/1Mbitx18SynchronousFlow-throughBurstSRAMdesignedspecificallytosupportunlimitedtrueback-to-backRead/Writeoperationswithouttheinsertionofwaitstates.TheCY7C1371D/CY7C1373DisequippedwiththeadvancedNo

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

Cypress

18-Mbit(512Kx36/1Mx18)Flow-ThroughSRAMwithNoBLTMArchitecture

FunctionalDescription[1] TheCY7C1371D/CY7C1373Disa3.3V,512Kx36/1Mbitx18SynchronousFlow-throughBurstSRAMdesignedspecificallytosupportunlimitedtrueback-to-backRead/Writeoperationswithouttheinsertionofwaitstates.TheCY7C1371D/CY7C1373DisequippedwiththeadvancedNo

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

Cypress

18-Mbit(512Kx36/1Mx18)Flow-ThroughSRAMwithNoBLTMArchitecture

FunctionalDescription[1] TheCY7C1371D/CY7C1373Disa3.3V,512Kx36/1Mbitx18SynchronousFlow-throughBurstSRAMdesignedspecificallytosupportunlimitedtrueback-to-backRead/Writeoperationswithouttheinsertionofwaitstates.TheCY7C1371D/CY7C1373DisequippedwiththeadvancedNo

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

Cypress

18-Mbit(512Kx36/1Mx18)Flow-ThroughSRAMwithNoBLTMArchitecture

FunctionalDescription[1] TheCY7C1371D/CY7C1373Disa3.3V,512Kx36/1Mbitx18SynchronousFlow-throughBurstSRAMdesignedspecificallytosupportunlimitedtrueback-to-backRead/Writeoperationswithouttheinsertionofwaitstates.TheCY7C1371D/CY7C1373DisequippedwiththeadvancedNo

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

Cypress

18-Mbit(512Kx36/1Mx18)Flow-ThroughSRAMwithNoBLTMArchitecture

FunctionalDescription[1] TheCY7C1371D/CY7C1373Disa3.3V,512Kx36/1Mbitx18SynchronousFlow-throughBurstSRAMdesignedspecificallytosupportunlimitedtrueback-to-backRead/Writeoperationswithouttheinsertionofwaitstates.TheCY7C1371D/CY7C1373DisequippedwiththeadvancedNo

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

Cypress

18-Mbit(512Kx36/1Mx18)Flow-ThroughSRAMwithNoBLTMArchitecture

FunctionalDescription[1] TheCY7C1371D/CY7C1373Disa3.3V,512Kx36/1Mbitx18SynchronousFlow-throughBurstSRAMdesignedspecificallytosupportunlimitedtrueback-to-backRead/Writeoperationswithouttheinsertionofwaitstates.TheCY7C1371D/CY7C1373DisequippedwiththeadvancedNo

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

Cypress

18-Mbit(512Kx36/1Mx18)Flow-ThroughSRAMwithNoBLTMArchitecture

FunctionalDescription[1] TheCY7C1371D/CY7C1373Disa3.3V,512Kx36/1Mbitx18SynchronousFlow-throughBurstSRAMdesignedspecificallytosupportunlimitedtrueback-to-backRead/Writeoperationswithouttheinsertionofwaitstates.TheCY7C1371D/CY7C1373DisequippedwiththeadvancedNo

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

Cypress

18-Mbit(512Kx36/1Mx18)Flow-ThroughSRAMwithNoBLTMArchitecture

FunctionalDescription[1] TheCY7C1371D/CY7C1373Disa3.3V,512Kx36/1Mbitx18SynchronousFlow-throughBurstSRAMdesignedspecificallytosupportunlimitedtrueback-to-backRead/Writeoperationswithouttheinsertionofwaitstates.TheCY7C1371D/CY7C1373DisequippedwiththeadvancedNo

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

Cypress

18-Mbit(512Kx36/1Mx18)Flow-ThroughSRAMwithNoBLTMArchitecture

FunctionalDescription[1] TheCY7C1371D/CY7C1373Disa3.3V,512Kx36/1Mbitx18SynchronousFlow-throughBurstSRAMdesignedspecificallytosupportunlimitedtrueback-to-backRead/Writeoperationswithouttheinsertionofwaitstates.TheCY7C1371D/CY7C1373DisequippedwiththeadvancedNo

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

Cypress

18-Mbit(512Kx36/1Mx18)Flow-ThroughSRAMwithNoBLTMArchitecture

FunctionalDescription[1] TheCY7C1371D/CY7C1373Disa3.3V,512Kx36/1Mbitx18SynchronousFlow-throughBurstSRAMdesignedspecificallytosupportunlimitedtrueback-to-backRead/Writeoperationswithouttheinsertionofwaitstates.TheCY7C1371D/CY7C1373DisequippedwiththeadvancedNo

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

Cypress

18-Mbit(512Kx36/1Mx18)Flow-ThroughSRAMwithNoBLTMArchitecture

FunctionalDescription[1] TheCY7C1371D/CY7C1373Disa3.3V,512Kx36/1Mbitx18SynchronousFlow-throughBurstSRAMdesignedspecificallytosupportunlimitedtrueback-to-backRead/Writeoperationswithouttheinsertionofwaitstates.TheCY7C1371D/CY7C1373DisequippedwiththeadvancedNo

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

Cypress

18-Mbit(512Kx36/1Mx18)Flow-ThroughSRAMwithNoBLTMArchitecture

FunctionalDescription[1] TheCY7C1371D/CY7C1373Disa3.3V,512Kx36/1Mbitx18SynchronousFlow-throughBurstSRAMdesignedspecificallytosupportunlimitedtrueback-to-backRead/Writeoperationswithouttheinsertionofwaitstates.TheCY7C1371D/CY7C1373DisequippedwiththeadvancedNo

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

Cypress

18-Mbit(512Kx36/1Mx18)Flow-ThroughSRAMwithNoBLTMArchitecture

FunctionalDescription[1] TheCY7C1371D/CY7C1373Disa3.3V,512Kx36/1Mbitx18SynchronousFlow-throughBurstSRAMdesignedspecificallytosupportunlimitedtrueback-to-backRead/Writeoperationswithouttheinsertionofwaitstates.TheCY7C1371D/CY7C1373DisequippedwiththeadvancedNo

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

Cypress

18-Mbit(512Kx36/1Mx18)Flow-ThroughSRAMwithNoBLTMArchitecture

FunctionalDescription[1] TheCY7C1371D/CY7C1373Disa3.3V,512Kx36/1Mbitx18SynchronousFlow-throughBurstSRAMdesignedspecificallytosupportunlimitedtrueback-to-backRead/Writeoperationswithouttheinsertionofwaitstates.TheCY7C1371D/CY7C1373DisequippedwiththeadvancedNo

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

Cypress

18-Mbit(512Kx36/1Mx18)Flow-ThroughSRAMwithNoBLTMArchitecture

FunctionalDescription[1] TheCY7C1371D/CY7C1373Disa3.3V,512Kx36/1Mbitx18SynchronousFlow-throughBurstSRAMdesignedspecificallytosupportunlimitedtrueback-to-backRead/Writeoperationswithouttheinsertionofwaitstates.TheCY7C1371D/CY7C1373DisequippedwiththeadvancedNo

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

Cypress

18-Mbit(512Kx36/1Mx18)Flow-ThroughSRAMwithNoBL??Architecture

文件:1.01162 Mbytes Page:29 Pages

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

Cypress

18-Mbit(512K횞36/1M횞18)Flow-ThroughSRAMwithNoBL??Architecture

文件:1.07276 Mbytes Page:37 Pages

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

Cypress

18-Mbit(512K횞36/1M횞18)Flow-ThroughSRAMwithNoBL??Architecture

文件:1.07276 Mbytes Page:37 Pages

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

Cypress

18-Mbit(512Kx36/1Mx18)Flow-ThroughSRAMwithNoBL??Architecture

文件:1.01162 Mbytes Page:29 Pages

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

Cypress

封装/外壳:100-LQFP 包装:托盘托盘 描述:IC SRAM 18MBIT PARALLEL 100TQFP 集成电路(IC) 存储器

CYP

Cypress Semiconductor Corp

CYP

18-Mbit(512K횞36/1M횞18)Flow-ThroughSRAMwithNoBL??Architecture

文件:1.07276 Mbytes Page:37 Pages

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

Cypress

封装/外壳:100-LQFP 包装:托盘托盘 描述:IC SRAM 18MBIT PARALLEL 100TQFP 集成电路(IC) 存储器

CYP

Cypress Semiconductor Corp

CYP

18-Mbit(512Kx36/1Mx18)Flow-ThroughSRAMwithNoBL??Architecture

文件:1.01162 Mbytes Page:29 Pages

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

Cypress

18-Mbit(512Kx36/1Mx18)Flow-ThroughSRAMwithNoBL??Architecture

文件:1.01162 Mbytes Page:29 Pages

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

Cypress

18-Mbit(512Kx36/1Mx18)Flow-ThroughSRAMwithNoBL??Architecture

文件:1.01162 Mbytes Page:29 Pages

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

Cypress

18-Mbit(512Kx36/1Mx18)Flow-ThroughSRAMwithNoBL??Architecture

文件:1.01162 Mbytes Page:29 Pages

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

Cypress

18-Mbit(512Kx36/1Mx18)Flow-ThroughSRAMwithNoBL??Architecture

文件:1.01162 Mbytes Page:29 Pages

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

Cypress

18-Mbit(512Kx36/1Mx18)Flow-ThroughSRAMwithNoBL??Architecture

文件:1.01162 Mbytes Page:29 Pages

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

Cypress

18-Mbit(512Kx36/1Mx18)Flow-ThroughSRAMwithNoBL??Architecture

文件:1.01162 Mbytes Page:29 Pages

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

Cypress

18-Mbit(512Kx36/1Mx18)Flow-ThroughSRAMwithNoBL??Architecture

文件:1.01162 Mbytes Page:29 Pages

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

Cypress

18-Mbit(512Kx36/1Mx18)Flow-ThroughSRAMwithNoBL??Architecture

文件:1.01162 Mbytes Page:29 Pages

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

Cypress

18-Mbit(512Kx36/1Mx18)Flow-ThroughSRAMwithNoBL??Architecture

文件:1.01162 Mbytes Page:29 Pages

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

Cypress

18-Mbit(512K횞36/1M횞18)Flow-ThroughSRAMwithNoBL??Architecture

文件:1.07276 Mbytes Page:37 Pages

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

Cypress

18-Mbit(512Kx36/1Mx18)Flow-ThroughSRAMwithNoBL??Architecture

文件:1.01162 Mbytes Page:29 Pages

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

Cypress

18-Mbit(512K횞36/1M횞18)Flow-ThroughSRAMwithNoBL??Architecture

文件:1.07276 Mbytes Page:37 Pages

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

Cypress

18-Mbit(512Kx36/1Mx18)Flow-ThroughSRAMwithNoBL??Architecture

文件:1.01162 Mbytes Page:29 Pages

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

Cypress

18-Mbit(512Kx36/1Mx18)Flow-ThroughSRAMwithNoBL??Architecture

文件:1.01162 Mbytes Page:29 Pages

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

Cypress

18-Mbit(512Kx36/1Mx18)Flow-ThroughSRAMwithNoBL??Architecture

文件:1.01162 Mbytes Page:29 Pages

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

Cypress

18-Mbit(512Kx36/1Mx18)Flow-ThroughSRAMwithNoBL??Architecture

文件:1.01162 Mbytes Page:29 Pages

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

Cypress

18-Mbit(512Kx36/1Mx18)Flow-ThroughSRAMwithNoBL??Architecture

文件:1.01162 Mbytes Page:29 Pages

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

Cypress

18-Mbit(512Kx36/1Mx18)Flow-ThroughSRAMwithNoBL??Architecture

文件:1.01162 Mbytes Page:29 Pages

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

Cypress

18-Mbit(512Kx36/1Mx18)Flow-ThroughSRAMwithNoBL??Architecture

文件:1.01162 Mbytes Page:29 Pages

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

Cypress

18-Mbit(512Kx36/1Mx18)Flow-ThroughSRAMwithNoBL??Architecture

文件:1.01162 Mbytes Page:29 Pages

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

Cypress

18-Mbit(512Kx36/1Mx18)Flow-ThroughSRAMwithNoBL??Architecture

文件:444.2 Kbytes Page:28 Pages

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

Cypress

18-Mbit(512Kx36/1Mx18)Flow-ThroughSRAMwithNoBL??Architecture

文件:444.2 Kbytes Page:28 Pages

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

Cypress

18-Mbit(512Kx36/1Mx18)Flow-ThroughSRAMwithNoBL??Architecture

文件:444.2 Kbytes Page:28 Pages

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

Cypress

18-Mbit(512Kx36/1Mx18)Flow-ThroughSRAMwithNoBL??Architecture

文件:444.2 Kbytes Page:28 Pages

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

Cypress

18-Mbit(512Kx36/1Mx18)Flow-ThroughSRAMwithNoBL??Architecture

文件:444.2 Kbytes Page:28 Pages

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

Cypress

18-Mbit(512Kx36/1Mx18)Flow-ThroughSRAMwithNoBL??Architecture

文件:444.2 Kbytes Page:28 Pages

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

Cypress

18-Mbit(512Kx36/1Mx18)Flow-ThroughSRAMwithNoBL??Architecture

文件:444.2 Kbytes Page:28 Pages

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

Cypress

18-Mbit(512Kx36/1Mx18)Flow-ThroughSRAMwithNoBL??Architecture

文件:444.2 Kbytes Page:28 Pages

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

Cypress

18-Mbit(512Kx36/1Mx18)Flow-ThroughSRAMwithNoBL??Architecture

文件:444.2 Kbytes Page:28 Pages

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

Cypress

18-Mbit(512Kx36/1Mx18)Flow-ThroughSRAMwithNoBL??Architecture

文件:444.2 Kbytes Page:28 Pages

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

Cypress

CY7C1371D产品属性

  • 类型

    描述

  • 型号

    CY7C1371D

  • 功能描述

    静态随机存取存储器 512Kx36 3.3V NoBL Sync FT 静态随机存取存储器 COM

  • RoHS

  • 制造商

    Cypress Semiconductor

  • 存储容量

    16 Mbit

  • 组织

    1 M x 16

  • 访问时间

    55 ns

  • 电源电压-最大

    3.6 V

  • 电源电压-最小

    2.2 V

  • 最大工作电流

    22 uA

  • 最大工作温度

    + 85 C

  • 最小工作温度

    - 40 C

  • 安装风格

    SMD/SMT

  • 封装/箱体

    TSOP-48

  • 封装

    Tray

更新时间:2024-6-21 22:30:00
IC供应商 芯片型号 品牌 批号 封装 库存 备注 价格
CYPRESS
2020+
BGA119
80000
只做自己库存,全新原装进口正品假一赔百,可开13%增
CY
23+
NA
2005
专业电子元器件供应链正迈科技特价代理QQ1304306553
Cypress
23+
100-LQFP
7750
全新原装优势
cypress
713
LQFP
15
一级代理,专注军工、汽车、医疗、工业、新能源、电力
cyp
22+
500000
行业低价,代理渠道
CYPRESS/赛普拉斯
2022
BGA119
80000
原装现货,OEM渠道,欢迎咨询
CYP
RoHSCompliant
Tray
432
neworiginal
CYPRESS
22+
35000
OEM工厂,中国区10年优质供应商!
CY7C1371D-133BGCT
454
454
Cypress
24+
SMT
6000
原装正品一手资源现货。

CY7C1371D芯片相关品牌

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  • RECOM
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  • WILLOW

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