CY7C1357C价格

参考价格:¥69.8386

型号:CY7C1357C-100BZC 品牌:Cynergy 3 备注:这里有CY7C1357C多少钱,2025年最近7天走势,今日出价,今日竞价,CY7C1357C批发/采购报价,CY7C1357C行情走势销售排行榜,CY7C1357C报价。
型号 功能描述 生产厂家 企业 LOGO 操作
CY7C1357C

9-Mbit (256K x 36/512K x 18) Flow-Through SRAM with NoBL Architecture

Functional Description[1] The CY7C1355C/CY7C1357C is a 3.3V, 256K x 36/512K x 18 Synchronous Flow-through Burst SRAM designed specifically to support unlimited true back-to-back Read/Write operations without the insertion of wait states. The CY7C1355C/CY7C1357C is equipped with the advanced No Bu

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

CY7C1357C

9-Mbit (256K x 36/512K x 18) Flow-Through SRAM with NoBL??Architecture

文件:504.58 Kbytes Page:28 Pages

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

9-Mbit (256K x 36/512K x 18) Flow-Through SRAM with NoBL Architecture

Functional Description[1] The CY7C1355C/CY7C1357C is a 3.3V, 256K x 36/512K x 18 Synchronous Flow-through Burst SRAM designed specifically to support unlimited true back-to-back Read/Write operations without the insertion of wait states. The CY7C1355C/CY7C1357C is equipped with the advanced No Bu

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

9-Mbit (256K x 36/512K x 18) Flow-Through SRAM with NoBL Architecture

Functional Description[1] The CY7C1355C/CY7C1357C is a 3.3V, 256K x 36/512K x 18 Synchronous Flow-through Burst SRAM designed specifically to support unlimited true back-to-back Read/Write operations without the insertion of wait states. The CY7C1355C/CY7C1357C is equipped with the advanced No Bu

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

9-Mbit (256K x 36/512K x 18) Flow-Through SRAM with NoBL Architecture

Functional Description[1] The CY7C1355C/CY7C1357C is a 3.3V, 256K x 36/512K x 18 Synchronous Flow-through Burst SRAM designed specifically to support unlimited true back-to-back Read/Write operations without the insertion of wait states. The CY7C1355C/CY7C1357C is equipped with the advanced No Bu

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

9-Mbit (256K x 36/512K x 18) Flow-Through SRAM with NoBL Architecture

Functional Description[1] The CY7C1355C/CY7C1357C is a 3.3V, 256K x 36/512K x 18 Synchronous Flow-through Burst SRAM designed specifically to support unlimited true back-to-back Read/Write operations without the insertion of wait states. The CY7C1355C/CY7C1357C is equipped with the advanced No Bu

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

9-Mbit (256K x 36/512K x 18) Flow-Through SRAM with NoBL Architecture

Functional Description[1] The CY7C1355C/CY7C1357C is a 3.3V, 256K x 36/512K x 18 Synchronous Flow-through Burst SRAM designed specifically to support unlimited true back-to-back Read/Write operations without the insertion of wait states. The CY7C1355C/CY7C1357C is equipped with the advanced No Bu

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

9-Mbit (256K x 36/512K x 18) Flow-Through SRAM with NoBL Architecture

Functional Description[1] The CY7C1355C/CY7C1357C is a 3.3V, 256K x 36/512K x 18 Synchronous Flow-through Burst SRAM designed specifically to support unlimited true back-to-back Read/Write operations without the insertion of wait states. The CY7C1355C/CY7C1357C is equipped with the advanced No Bu

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

9-Mbit (256K x 36/512K x 18) Flow-Through SRAM with NoBL Architecture

Functional Description[1] The CY7C1355C/CY7C1357C is a 3.3V, 256K x 36/512K x 18 Synchronous Flow-through Burst SRAM designed specifically to support unlimited true back-to-back Read/Write operations without the insertion of wait states. The CY7C1355C/CY7C1357C is equipped with the advanced No Bu

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

9-Mbit (256K x 36/512K x 18) Flow-Through SRAM with NoBL Architecture

Functional Description[1] The CY7C1355C/CY7C1357C is a 3.3V, 256K x 36/512K x 18 Synchronous Flow-through Burst SRAM designed specifically to support unlimited true back-to-back Read/Write operations without the insertion of wait states. The CY7C1355C/CY7C1357C is equipped with the advanced No Bu

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

9-Mbit (256K x 36/512K x 18) Flow-Through SRAM with NoBL Architecture

Functional Description[1] The CY7C1355C/CY7C1357C is a 3.3V, 256K x 36/512K x 18 Synchronous Flow-through Burst SRAM designed specifically to support unlimited true back-to-back Read/Write operations without the insertion of wait states. The CY7C1355C/CY7C1357C is equipped with the advanced No Bu

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

9-Mbit (256K x 36/512K x 18) Flow-Through SRAM with NoBL Architecture

Functional Description[1] The CY7C1355C/CY7C1357C is a 3.3V, 256K x 36/512K x 18 Synchronous Flow-through Burst SRAM designed specifically to support unlimited true back-to-back Read/Write operations without the insertion of wait states. The CY7C1355C/CY7C1357C is equipped with the advanced No Bu

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

9-Mbit (256K x 36/512K x 18) Flow-Through SRAM with NoBL Architecture

Functional Description[1] The CY7C1355C/CY7C1357C is a 3.3V, 256K x 36/512K x 18 Synchronous Flow-through Burst SRAM designed specifically to support unlimited true back-to-back Read/Write operations without the insertion of wait states. The CY7C1355C/CY7C1357C is equipped with the advanced No Bu

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

9-Mbit (256K x 36/512K x 18) Flow-Through SRAM with NoBL Architecture

Functional Description[1] The CY7C1355C/CY7C1357C is a 3.3V, 256K x 36/512K x 18 Synchronous Flow-through Burst SRAM designed specifically to support unlimited true back-to-back Read/Write operations without the insertion of wait states. The CY7C1355C/CY7C1357C is equipped with the advanced No Bu

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

9-Mbit (256K x 36/512K x 18) Flow-Through SRAM with NoBL Architecture

Functional Description[1] The CY7C1355C/CY7C1357C is a 3.3V, 256K x 36/512K x 18 Synchronous Flow-through Burst SRAM designed specifically to support unlimited true back-to-back Read/Write operations without the insertion of wait states. The CY7C1355C/CY7C1357C is equipped with the advanced No Bu

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

9-Mbit (256K x 36/512K x 18) Flow-Through SRAM with NoBL Architecture

Functional Description[1] The CY7C1355C/CY7C1357C is a 3.3V, 256K x 36/512K x 18 Synchronous Flow-through Burst SRAM designed specifically to support unlimited true back-to-back Read/Write operations without the insertion of wait states. The CY7C1355C/CY7C1357C is equipped with the advanced No Bu

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

9-Mbit (256K x 36/512K x 18) Flow-Through SRAM with NoBL Architecture

Functional Description[1] The CY7C1355C/CY7C1357C is a 3.3V, 256K x 36/512K x 18 Synchronous Flow-through Burst SRAM designed specifically to support unlimited true back-to-back Read/Write operations without the insertion of wait states. The CY7C1355C/CY7C1357C is equipped with the advanced No Bu

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

9-Mbit (256K x 36/512K x 18) Flow-Through SRAM with NoBL Architecture

Functional Description[1] The CY7C1355C/CY7C1357C is a 3.3V, 256K x 36/512K x 18 Synchronous Flow-through Burst SRAM designed specifically to support unlimited true back-to-back Read/Write operations without the insertion of wait states. The CY7C1355C/CY7C1357C is equipped with the advanced No Bu

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

9-Mbit (256K x 36/512K x 18) Flow-Through SRAM with NoBL Architecture

Functional Description[1] The CY7C1355C/CY7C1357C is a 3.3V, 256K x 36/512K x 18 Synchronous Flow-through Burst SRAM designed specifically to support unlimited true back-to-back Read/Write operations without the insertion of wait states. The CY7C1355C/CY7C1357C is equipped with the advanced No Bu

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

9-Mbit (256K x 36/512K x 18) Flow-Through SRAM with NoBL??Architecture

文件:504.58 Kbytes Page:28 Pages

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

IC SRAM 9M PARALLEL 100TQFP

Infineon

英飞凌

封装/外壳:100-LQFP 包装:托盘托盘 描述:IC SRAM 9MBIT PARALLEL 100TQFP 集成电路(IC) 存储器

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

9-Mbit (256K x 36/512K x 18) Flow-Through SRAM with NoBL??Architecture

文件:504.58 Kbytes Page:28 Pages

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

9-Mbit (256K x 36/512K x 18) Flow-Through SRAM with NoBL??Architecture

文件:504.58 Kbytes Page:28 Pages

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

9-Mbit (256K x 36/512K x 18) Flow-Through SRAM with NoBL??Architecture

文件:504.58 Kbytes Page:28 Pages

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

9-Mbit (256K x 36/512K x 18) Flow-Through SRAM with NoBL??Architecture

文件:504.58 Kbytes Page:28 Pages

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

9-Mbit (256K x 36/512K x 18) Flow-Through SRAM with NoBL??Architecture

文件:504.58 Kbytes Page:28 Pages

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

Synchronous SRAM

Infineon

英飞凌

封装/外壳:165-LBGA 包装:散装托盘 描述:IC SRAM 9MBIT PARALLEL 165FBGA 集成电路(IC) 存储器

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

9-Mbit (256 K x 36 / 512 K x 18) Flow-through SRAM with NoBL Architecture

文件:795.58 Kbytes Page:32 Pages

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

9-Mbit (256 K 횞 36 / 512 K 횞 18) Flow-Through SRAM with NoBL??Architecture

文件:783.8 Kbytes Page:33 Pages

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

9-Mbit (256K x 36/512K x 18) Flow-Through SRAM with NoBL??Architecture

文件:504.58 Kbytes Page:28 Pages

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

9-Mbit (256K x 36/512K x 18) Flow-Through SRAM with NoBL??Architecture

文件:504.58 Kbytes Page:28 Pages

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

9-Mbit (256K x 36/512K x 18) Flow-Through SRAM with NoBL??Architecture

文件:504.58 Kbytes Page:28 Pages

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

9-Mbit (256K x 36/512K x 18) Flow-Through SRAM with NoBL??Architecture

文件:504.58 Kbytes Page:28 Pages

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

9-Mbit (256K x 36/512K x 18) Flow-Through SRAM with NoBL??Architecture

文件:504.58 Kbytes Page:28 Pages

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

Synchronous SRAM

Infineon

英飞凌

9-Mbit (256 K x 36 / 512 K x 18) Flow-through SRAM with NoBL Architecture

文件:795.58 Kbytes Page:32 Pages

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

9-Mbit (256 K 횞 36 / 512 K 횞 18) Flow-Through SRAM with NoBL??Architecture

文件:783.8 Kbytes Page:33 Pages

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

9-Mbit (256K x 36/512K x 18) Flow-Through SRAM with NoBL??Architecture

文件:504.58 Kbytes Page:28 Pages

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

9-Mbit (256K x 36/512K x 18) Flow-Through SRAM with NoBL??Architecture

文件:504.58 Kbytes Page:28 Pages

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

9-Mbit (256K x 36/512K x 18) Flow-Through SRAM with NoBL??Architecture

文件:504.58 Kbytes Page:28 Pages

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

9-Mbit (256K x 36/512K x 18) Flow-Through SRAM with NoBL??Architecture

文件:504.58 Kbytes Page:28 Pages

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

9-Mbit (256K x 36/512K x 18) Flow-Through SRAM with NoBL??Architecture

文件:504.58 Kbytes Page:28 Pages

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

9-Mbit (256K x 36/512K x 18) Flow-Through SRAM with NoBL??Architecture

文件:504.58 Kbytes Page:28 Pages

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

9-Mbit (256K x 36/512K x 18) Flow-Through SRAM with NoBL??Architecture

文件:504.58 Kbytes Page:28 Pages

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

9-Mbit (256K x 36/512K x 18) Flow-Through SRAM with NoBL??Architecture

文件:504.58 Kbytes Page:28 Pages

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

9-Mbit (256K x 36/512K x 18) Flow-Through SRAM with NoBL??Architecture

文件:504.58 Kbytes Page:28 Pages

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

256K x 36/512K x 18 Synchronous Flow-Thru SRAM with NoBL Architecture

Functional Description The CY7C1355A and CY7C1357A SRAMs are designed to eliminate dead cycles when transitions from READ to WRITE or vice versa. These SRAMs are optimized for 100 percent bus utilization and achieves Zero Bus Latency (ZBL). They integrate 262,144 × 36 and 524,288 × 18 SRAM cells,

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

9-Mb (256K x 36/512K x 18) Flow-Through SRAM with NoBL Architecture

Functional Description[1] The CY7C1355B/CY7C1357B is a 3.3V, 256K x 36/ 512K x 18 Synchronous Flow-through Burst SRAM designed specifically to support unlimited true back-to-back Read/Write operations without the insertion of wait states. The CY7C1355B/CY7C1357B is equipped with the advanced No B

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

CY7C1357C产品属性

  • 类型

    描述

  • 型号

    CY7C1357C

  • 功能描述

    静态随机存取存储器 512Kx18 3.3V NoBL Sync FT 静态随机存取存储器 COM

  • RoHS

  • 制造商

    Cypress Semiconductor

  • 存储容量

    16 Mbit

  • 组织

    1 M x 16

  • 访问时间

    55 ns

  • 电源电压-最大

    3.6 V

  • 电源电压-最小

    2.2 V

  • 最大工作电流

    22 uA

  • 最大工作温度

    + 85 C

  • 最小工作温度

    - 40 C

  • 安装风格

    SMD/SMT

  • 封装/箱体

    TSOP-48

  • 封装

    Tray

更新时间:2025-10-20 15:51:00
IC供应商 芯片型号 品牌 批号 封装 库存 备注 价格
CYPRESS
23+
BGAQFP
8659
原装公司现货!原装正品价格优势.
Cypress
23+
100-TQFP
65600
CYPRESS/赛普拉斯
22+
TQFP100
12245
现货,原厂原装假一罚十!
Cypress
22+
100TQFP (14x20)
9000
原厂渠道,现货配单
CYPRESS/赛普拉斯
23+
QFP100L
3000
一级代理原厂VIP渠道,专注军工、汽车、医疗、工业、
CYPRESS/赛普拉斯
2450+
QFP100
9850
只做原装正品现货或订货假一赔十!
CYPRESS
24+
100TQFP
3000
只做原装正品现货 欢迎来电查询15919825718
CYPRESS
原厂封装
9800
原装进口公司现货假一赔百
CYP
23+
贴片
5000
原装正品,假一罚十
CYPRESS
23+
QFP100
8560
受权代理!全新原装现货特价热卖!

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