18-Mbit DDR-II SRAM 2-Word Burst Architecture

Functional Description The CY7C1316CV18, CY7C1916CV18, CY7C1318CV18, and CY7C1320CV18 are 1.8V Synchronous Pipelined SRAMs equipped with DDR-II architecture. The DDR-II consists of an SRAM core with advanced synchronous peripheral circuitry and a one-bit burst counter. Addresses for read and wr

18-Mbit DDR-II SRAM 2-Word Burst Architecture

Functional Description The CY7C1316CV18, CY7C1916CV18, CY7C1318CV18, and CY7C1320CV18 are 1.8V Synchronous Pipelined SRAMs equipped with DDR-II architecture. The DDR-II consists of an SRAM core with advanced synchronous peripheral circuitry and a one-bit burst counter. Addresses for read and wr

18-Mbit DDR-II SRAM 2-Word Burst Architecture

Functional Description The CY7C1316CV18, CY7C1916CV18, CY7C1318CV18, and CY7C1320CV18 are 1.8V Synchronous Pipelined SRAMs equipped with DDR-II architecture. The DDR-II consists of an SRAM core with advanced synchronous peripheral circuitry and a one-bit burst counter. Addresses for read and wr

18-Mbit DDR-II SRAM 2-Word Burst Architecture

Functional Description The CY7C1316CV18, CY7C1916CV18, CY7C1318CV18, and CY7C1320CV18 are 1.8V Synchronous Pipelined SRAMs equipped with DDR-II architecture. The DDR-II consists of an SRAM core with advanced synchronous peripheral circuitry and a one-bit burst counter. Addresses for read and wr

18-Mbit DDR II SRAM 2-Word Burst Architecture

文件：1.24187 Mbytes Page：29 Pages

18-Mbit DDR II SRAM 2-Word Burst Architecture

文件：1.24187 Mbytes Page：29 Pages