CY7C130价格

参考价格:¥177.8891

型号:CY7C1308SV25C-167BZXC 品牌:Cynergy 3 备注:这里有CY7C130多少钱,2026年最近7天走势,今日出价,今日竞价,CY7C130批发/采购报价,CY7C130行情走势销售排行榜,CY7C130报价。
型号 功能描述 生产厂家 企业 LOGO 操作
CY7C130

1K x 8 Dual-Port Static Ram

Functional Description The CY7C130/CY7C131/CY7C140 and CY7C141 are high-speed CMOS 1K by 8 dual-port static RAMs. Two ports are provided permitting independent access to any location in memory. The CY7C130/ CY7C131 can be utilized as either a standalone 8-bit dual-port static RAM or as a master

CYPRESSCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

CY7C130

1K x 8 Dual-Port Static RAM

文件:570.93 Kbytes Page:19 Pages

CYPRESSCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

128K X 36 Dual I/O Dual Address Synchronous SRAM

Functional Description The CY7C1300A SRAM integrates 131,072 × 36 SRAM cells with advanced synchronous peripheral circuitry. It employs high-speed, low-power CMOS designs using advanced triple-layer polysilicon, double-layer metal technology. Each memory cell consists of four transistors and two

CYPRESSCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

128K X 36 Dual I/O Dual Address Synchronous SRAM

Functional Description The CY7C1300A SRAM integrates 131,072 × 36 SRAM cells with advanced synchronous peripheral circuitry. It employs high-speed, low-power CMOS designs using advanced triple-layer polysilicon, double-layer metal technology. Each memory cell consists of four transistors and two

CYPRESSCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

128K X 36 Dual I/O Dual Address Synchronous SRAM

Functional Description The CY7C1300A SRAM integrates 131,072 × 36 SRAM cells with advanced synchronous peripheral circuitry. It employs high-speed, low-power CMOS designs using advanced triple-layer polysilicon, double-layer metal technology. Each memory cell consists of four transistors and two

CYPRESSCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

9-Mbit Burst of Two Pipelined SRAMs with QDR Architecture

Functional Description The CY7C1302DV25 is a 2.5V Synchronous Pipelined SRAM equipped with QDR™ architecture. QDR architecture consists of two separate ports to access the memory array. The Read port has dedicated data outputs to support Read operations and the Write Port has dedicated data input

CYPRESSCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

9-Mbit Burst of Two Pipelined SRAMs with QDR Architecture

Functional Description The CY7C1302DV25 is a 2.5V Synchronous Pipelined SRAM equipped with QDR™ architecture. QDR architecture consists of two separate ports to access the memory array. The Read port has dedicated data outputs to support Read operations and the Write Port has dedicated data input

CYPRESSCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

9-Mbit Burst of Two Pipelined SRAMs with QDR Architecture

Functional Description The CY7C1302DV25 is a 2.5V Synchronous Pipelined SRAM equipped with QDR™ architecture. QDR architecture consists of two separate ports to access the memory array. The Read port has dedicated data outputs to support Read operations and the Write Port has dedicated data input

CYPRESSCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

9-Mbit Burst of Two Pipelined SRAMs with QDR Architecture

Functional Description The CY7C1302DV25 is a 2.5V Synchronous Pipelined SRAM equipped with QDR™ architecture. QDR architecture consists of two separate ports to access the memory array. The Read port has dedicated data outputs to support Read operations and the Write Port has dedicated data input

CYPRESSCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

1K x 8 Dual-Port Static Ram

Functional Description The CY7C130/CY7C131/CY7C140 and CY7C141 are high-speed CMOS 1K by 8 dual-port static RAMs. Two ports are provided permitting independent access to any location in memory. The CY7C130/ CY7C131 can be utilized as either a standalone 8-bit dual-port static RAM or as a master

CYPRESSCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

1K x 8 Dual-Port Static Ram

Functional Description The CY7C130/CY7C131/CY7C140 and CY7C141 are high-speed CMOS 1K by 8 dual-port static RAMs. Two ports are provided permitting independent access to any location in memory. The CY7C130/ CY7C131 can be utilized as either a standalone 8-bit dual-port static RAM or as a master

CYPRESSCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

1K x 8 Dual-Port Static Ram

Functional Description The CY7C130/CY7C131/CY7C140 and CY7C141 are high-speed CMOS 1K by 8 dual-port static RAMs. Two ports are provided permitting independent access to any location in memory. The CY7C130/ CY7C131 can be utilized as either a standalone 8-bit dual-port static RAM or as a master

CYPRESSCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

1K x 8 Dual-Port Static Ram

Functional Description The CY7C130/CY7C131/CY7C140 and CY7C141 are high-speed CMOS 1K by 8 dual-port static RAMs. Two ports are provided permitting independent access to any location in memory. The CY7C130/ CY7C131 can be utilized as either a standalone 8-bit dual-port static RAM or as a master

CYPRESSCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

1K x 8 Dual-Port Static Ram

Functional Description The CY7C130/CY7C131/CY7C140 and CY7C141 are high-speed CMOS 1K by 8 dual-port static RAMs. Two ports are provided permitting independent access to any location in memory. The CY7C130/ CY7C131 can be utilized as either a standalone 8-bit dual-port static RAM or as a master

CYPRESSCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

1K x 8 Dual-Port Static Ram

Functional Description The CY7C130/CY7C131/CY7C140 and CY7C141 are high-speed CMOS 1K by 8 dual-port static RAMs. Two ports are provided permitting independent access to any location in memory. The CY7C130/ CY7C131 can be utilized as either a standalone 8-bit dual-port static RAM or as a master

CYPRESSCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

1K x 8 Dual-Port Static Ram

Functional Description The CY7C130/CY7C131/CY7C140 and CY7C141 are high-speed CMOS 1K by 8 dual-port static RAMs. Two ports are provided permitting independent access to any location in memory. The CY7C130/ CY7C131 can be utilized as either a standalone 8-bit dual-port static RAM or as a master

CYPRESSCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

1K x 8 Dual-Port Static Ram

Functional Description The CY7C130/CY7C131/CY7C140 and CY7C141 are high-speed CMOS 1K by 8 dual-port static RAMs. Two ports are provided permitting independent access to any location in memory. The CY7C130/ CY7C131 can be utilized as either a standalone 8-bit dual-port static RAM or as a master

CYPRESSCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

1K x 8 Dual-Port Static Ram

Functional Description The CY7C130/CY7C131/CY7C140 and CY7C141 are high-speed CMOS 1K by 8 dual-port static RAMs. Two ports are provided permitting independent access to any location in memory. The CY7C130/ CY7C131 can be utilized as either a standalone 8-bit dual-port static RAM or as a master

CYPRESSCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

1K x 8 Dual-Port Static Ram

Functional Description The CY7C130/CY7C131/CY7C140 and CY7C141 are high-speed CMOS 1K by 8 dual-port static RAMs. Two ports are provided permitting independent access to any location in memory. The CY7C130/ CY7C131 can be utilized as either a standalone 8-bit dual-port static RAM or as a master

CYPRESSCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

1K x 8 Dual-Port Static Ram

Functional Description The CY7C130/CY7C131/CY7C140 and CY7C141 are high-speed CMOS 1K by 8 dual-port static RAMs. Two ports are provided permitting independent access to any location in memory. The CY7C130/ CY7C131 can be utilized as either a standalone 8-bit dual-port static RAM or as a master

CYPRESSCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

RAM9 QDR-I/DDR-I/QDR-II/DDR- II Errata

RAM9 QDR-I/DDR-I/QDR-II/DDR- II Errata This document describes the DOFF issue for QDRII/DDRII and the Output Buffer and JTAG issues for QDRI/DDRI/QDRII/DDRII. Details include trigger conditions, possible workarounds and silicon revision applicability. This document should be used to compare to th

CYPRESSCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

RAM9 QDR-I/DDR-I/QDR-II/DDR- II Errata

RAM9 QDR-I/DDR-I/QDR-II/DDR- II Errata This document describes the DOFF issue for QDRII/DDRII and the Output Buffer and JTAG issues for QDRI/DDRI/QDRII/DDRII. Details include trigger conditions, possible workarounds and silicon revision applicability. This document should be used to compare to th

CYPRESSCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

RAM9 QDR-I/DDR-I/QDR-II/DDR- II Errata

RAM9 QDR-I/DDR-I/QDR-II/DDR- II Errata This document describes the DOFF issue for QDRII/DDRII and the Output Buffer and JTAG issues for QDRI/DDRI/QDRII/DDRII. Details include trigger conditions, possible workarounds and silicon revision applicability. This document should be used to compare to th

CYPRESSCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

1K x 8 Dual-Port Static RAM

文件:570.93 Kbytes Page:19 Pages

CYPRESSCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

1 K 횞 8 Dual-Port Static RAM

文件:480.64 Kbytes Page:22 Pages

CYPRESSCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

9-Mbit Burst of Two Pipelined SRAMs with QDR™ Architecture

INFINEON

英飞凌

9-Mbit Burst of Two Pipelined SRAMs with QDR??Architecture

文件:296.16 Kbytes Page:18 Pages

CYPRESSCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

9-Mbit Burst of Two Pipelined SRAMs with QDR??Architecture

文件:296.16 Kbytes Page:18 Pages

CYPRESSCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

9-Mbit Burst of Two Pipelined SRAMs with QDR??Architecture

文件:296.16 Kbytes Page:18 Pages

CYPRESSCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

9-Mbit Burst of Two Pipelined SRAMs with QDR??Architecture

文件:296.16 Kbytes Page:18 Pages

CYPRESSCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

9-Mbit Burst of Two Pipelined SRAMs with QDR??Architecture

文件:296.16 Kbytes Page:18 Pages

CYPRESSCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

9-Mbit Burst of Two Pipelined SRAMs with QDR??Architecture

文件:296.16 Kbytes Page:18 Pages

CYPRESSCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

9-Mbit Burst of Two Pipelined SRAMs with QDR??Architecture

文件:296.16 Kbytes Page:18 Pages

CYPRESSCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

9-Mbit Burst of Two Pipelined SRAMs with QDR Architecture

文件:386.63 Kbytes Page:18 Pages

CYPRESSCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

9-Mbit Burst of Two Pipelined SRAMs with QDR Architecture JTAG Interface

文件:713.5 Kbytes Page:25 Pages

CYPRESSCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

9-Mbit Burst of Two Pipelined SRAMs with QDR Architecture

INFINEON

英飞凌

9-Mbit Burst of Two Pipelined SRAMs with QDR Architecture

文件:386.63 Kbytes Page:18 Pages

CYPRESSCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

9-Mbit Burst of Two Pipelined SRAMs with QDR Architecture JTAG Interface

文件:713.5 Kbytes Page:25 Pages

CYPRESSCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

9-Mbit Burst of Two Pipelined SRAMs with QDR Architecture JTAG Interface

文件:713.5 Kbytes Page:25 Pages

CYPRESSCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

9-Mbit Burst of Two Pipelined SRAMs with QDR Architecture

文件:386.63 Kbytes Page:18 Pages

CYPRESSCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

9-Mbit Burst of Two Pipelined SRAMs with QDR Architecture

文件:386.63 Kbytes Page:18 Pages

CYPRESSCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

9-Mbit Burst of Two Pipelined SRAMs with QDR Architecture

文件:386.63 Kbytes Page:18 Pages

CYPRESSCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

封装/外壳:165-LBGA 包装:卷带(TR) 描述:IC SRAM 9MBIT PARALLEL 165FBGA 集成电路(IC) 存储器

CYPRESSCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

9-Mbit Burst of Two Pipelined SRAMs with QDR Architecture

文件:386.63 Kbytes Page:18 Pages

CYPRESSCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

1K x 8 Dual-Port Static RAM

文件:570.93 Kbytes Page:19 Pages

CYPRESSCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

1K x 8 Dual-Port Static RAM

文件:570.93 Kbytes Page:19 Pages

CYPRESSCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

1K x 8 Dual-Port Static RAM

INFINEON

英飞凌

1K x 8 Dual-Port Static RAM

文件:570.93 Kbytes Page:19 Pages

CYPRESSCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

1K x 8 Dual-Port Static RAM

文件:570.93 Kbytes Page:19 Pages

CYPRESSCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

1K x 8 Dual-Port Static RAM

文件:570.93 Kbytes Page:19 Pages

CYPRESSCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

18-Mb Burst of 2 Pipelined SRAM with QDR??Architecture

文件:479.46 Kbytes Page:20 Pages

CYPRESSCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

18-Mb Burst of 2 Pipelined SRAM with QDR??Architecture

文件:479.46 Kbytes Page:20 Pages

CYPRESSCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

18-Mb Burst of 2 Pipelined SRAM with QDR??Architecture

文件:479.46 Kbytes Page:20 Pages

CYPRESSCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

18-Mb Burst of 2 Pipelined SRAM with QDR??Architecture

文件:479.46 Kbytes Page:20 Pages

CYPRESSCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

18-Mb Burst of 2 Pipelined SRAM with QDR??Architecture

文件:479.1 Kbytes Page:19 Pages

CYPRESSCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

18-Mb Burst of 2 Pipelined SRAM with QDR??Architecture

文件:479.1 Kbytes Page:19 Pages

CYPRESSCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

18-Mb Burst of 2 Pipelined SRAM with QDR??Architecture

文件:479.1 Kbytes Page:19 Pages

CYPRESSCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

18-Mb Burst of 2 Pipelined SRAM with QDR??Architecture

文件:479.1 Kbytes Page:19 Pages

CYPRESSCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

18-Mbit Burst of 2 Pipelined SRAM with QDR??Architecture

文件:246.57 Kbytes Page:19 Pages

CYPRESSCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

18-Mbit Burst of 2 Pipelined SRAM with QDR??Architecture

文件:246.57 Kbytes Page:19 Pages

CYPRESSCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

CY7C130产品属性

  • 类型

    描述

  • 型号

    CY7C130

  • 制造商

    Cypress Semiconductor

  • 功能描述

    SRAM Chip Sync Dual 3.3V 4.5M-Bit 128K x 36 6ns 176-Pin TQFP

更新时间:2026-3-13 22:30:00
IC供应商 芯片型号 品牌 批号 封装 库存 备注 价格
Cypress
24+
BGA
8000
只做自己库存,全新原装进口正品假一赔百,可开13%增
CYPRESS/赛普拉斯
2026+
QFP
24
原装正品,假一罚十!
CY
24+
DIP
8500
只做原装正品假一赔十为客户做到零风险!!
CYPRESS
24+
DIP
5650
公司原厂原装现货假一罚十!特价出售!强势库存!
cypress
25+
10
公司优势库存 热卖中!
CYPRESS
2138+
QFP
8960
专营BGA,QFP原装现货,假一赔十
CYPRESS
23+
QFP
7000
绝对全新原装!现货!特价!请放心订购!
CY
2023+
TSOP
50000
原装现货
CYPRESS/赛普拉斯
2022+
DIP
186
只做进口原装正品现货,开13%增值税票!
CYPRESS
22+
TQFP176
8000
原装正品支持实单

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