High-Frequency Programmable PECL Clock Generator

Introduction The CY2213 has a two-wire serial interface designed for data transfer operations, and is used for programming the P and Q values for frequency generation. Sclk is the serial clock line controlled by the master device. Sdata is a serial bidirectional data line. The CY2213 is a slave d

High-Frequency Programmable PECL Clock Generator

Introduction The CY2213 has a two-wire serial interface designed for data transfer operations, and is used for programming the P and Q values for frequency generation. Sclk is the serial clock line controlled by the master device. Sdata is a serial bidirectional data line. The CY2213 is a slave d

High-Frequency Programmable PECL Clock Generator

Introduction The CY2213 has a two-wire serial interface designed for data transfer operations, and is used for programming the P and Q values for frequency generation. Sclk is the serial clock line controlled by the master device. Sdata is a serial bidirectional data line. The CY2213 is a slave d

High-Frequency Programmable PECL Clock Generator

Introduction The CY2213 has a two-wire serial interface designed for data transfer operations, and is used for programming the P and Q values for frequency generation. Sclk is the serial clock line controlled by the master device. Sdata is a serial bidirectional data line. The CY2213 is a slave d

High-Frequency Programmable PECL Clock Generator

Introduction The CY2213 has a two-wire serial interface designed for data transfer operations, and is used for programming the P and Q values for frequency generation. Sclk is the serial clock line controlled by the master device. Sdata is a serial bidirectional data line. The CY2213 is a slave d

High Frequency Programmable PECL Clock Generator

文件：496.5 Kbytes Page：16 Pages

Timing Solutions - Clocks - Standard Performance Clock Generators -

High Frequency Programmable PECL Clock Generator

文件：496.5 Kbytes Page：16 Pages

Timing Solutions - Clocks - Standard Performance Clock Generators -

High Frequency Programmable PECL Clock Generator

文件：496.5 Kbytes Page：16 Pages

封装/外壳：16-TSSOP（0.173"，4.40mm 宽） 包装：卷带（TR） 描述：IC PROG PECL CLOCK GEN 16-TSSOP 集成电路（IC） 时钟发生器，PLL，频率合成器

IC PROG PECL CLOCK GEN 16-TSSOP

封装/外壳：16-TSSOP（0.173"，4.40mm 宽） 包装：卷带（TR） 描述：IC PROG PECL CLOCK GEN 16-TSSOP 集成电路（IC） 时钟发生器，PLL，频率合成器

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