US Audio Multiplexing Decoder

Description The CXA2104S is an IC designed as a decoder for the Zenith TV Multi-channel System and also corresponds with I2C BUS. Functions include stereo demodulation, SAP (Separate Audio Program) demodulation, dbx noise reduction. Various kinds of filters are built in while adjustment and mod

US Audio Multiplexing Decoder

Description\nThe CXA2104S is an IC designed as a decoder for the Zenith TV Multi-channel System and also corresponds with I2C BUS. Functions include stereo demodulation, SAP (Separate Audio Program) demodulation, dbx noise reduction. Various kinds of filters are built in while adjustment and mode co • Adjustment free of VCO and filter.\n• All adjustments are possible through I2C BUS to allow for automatic adjustment.\n• There is an additional SAP output.Applications\n  TV, VCR and other decoding systems for US audio multiplexing TV broadcasting ;

256KB and 512KB BurstRAM Secondary Cache Modules for PowerPC PReP/CHRP Platforms

The MPC2104/5/6/7 are designed to provide burstable, high performance L2 cache for the PowerPC 60x microprocessor family in conformance with the PowerPC Reference Platform (PReP) and the PowerPC Common Hardware Reference Platform (CHRP) specifications. These products utilize synchronous or asynchr

256KB/512KB BurstRAM Secondary Cache Modules for PowerPC PReP/CHRP Platforms

The MPC2104P (256KB) and MPC2105P (512KB) are designed to provide burstable, high performance L2 cache for the PowerPC 60x microprocessor family in conformance with the PowerPC Reference Platform (PReP) and the PowerPC Common Hardware Reference Platform (CHRP) specifications. All of these cache m

3V AM/FM 1 CHIP TUNER IC (FOR DIGITAL TUNING SYSTEM)

TA2104BN, TA2104BFN are AM/FM 1 chip tuner ICs, which are designed for portable Radios and 3V Head phone Radios.

P-Channel Enhancement-Mode Vertical DMOS FETs

General Description This low threshold enhancement-mode (normally-off) transistor utilizes a vertical DMOS structure and Supertex’s well-proven silicon-gate manufacturing process. This combination produces a device with the power handling capabilities of bipolar transistors and with the high in

P-Channel Enhancement-Mode Vertical DMOS FETs

General Description This low threshold enhancement-mode (normally-off) transistor utilizes a vertical DMOS structure and Supertex’s well-proven silicon-gate manufacturing process. This combination produces a device with the power handling capabilities of bipolar transistors and with the high in