4-Mb (128K x 32) Flow-Through Sync SRAM

Functional Description[1] The CY7C1338F is a 131,072 x 32 synchronous cache RAM designed to interface with high-speed microprocessors with minimum glue logic. Maximum access delay from clock rise is 6.5 ns (133-MHz version). A 2-bit on-chip counter captures the first address in a burst and increm

128K x 32 Synchronous-Flow-Through 3.3V Cache RAM

Functional Description The CY7C1338 is a 3.3V, 128K by 32 synchronous cache RAM designed to interface with high-speed microprocessors with minimum glue logic. Maximum access delay from clock rise is 7.5 ns (117-MHz version). A 2-bit on-chip counter captures the first address in a burst and increm

128K x 32 Synchronous-Flow-Through 3.3V Cache RAM

Functional Description The CY7C1338B is a 3.3V, 128K by 32 synchronous cache RAM designed to interface with high-speed microprocessors with minimum glue logic. Maximum access delay from clock rise is 7.5 ns (117-MHz version). A 2-bit on-chip counter captures the first address in a burst and incre

4-Mb (128K x 32) Flow-Through Sync SRAM

Functional Description[1] The CY7C1338F is a 131,072 x 32 synchronous cache RAM designed to interface with high-speed microprocessors with minimum glue logic. Maximum access delay from clock rise is 6.5 ns (133-MHz version). A 2-bit on-chip counter captures the first address in a burst and increm

4-Mbit (128K x 32) Flow-Through Sync SRAM

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