2.5V - 2.6V PHASE LOCKED LOOP DIFFERENTIAL 1:10 SDRAM CLOCK DRIVER

FEATURES: • 1 to 10 differential clock distribution • Optimized for clock distribution in DDR (Double Data Rate) SDRAM applications requiring improved output crosspoint voltage • Operating frequency: 60MHz to 220MHz • Very low skew: –

2.5V-2.6V Phase Locked Loop Differential 1:10 SDRAM Clock Driver

封装/外壳：56-TFBGA 包装：托盘 描述：IC CLK BUF DDR 220MHZ 1CIRC 集成电路（IC） 应用特定时钟/定时

封装/外壳：48-TFSOP（0.240"，6.10mm 宽） 包装：托盘 描述：IC CLK BUF DDR 220MHZ 1CIRC 集成电路（IC） 应用特定时钟/定时

PNP general purpose transistors

DESCRIPTION PNP transistor encapsulated in an ultra small SC-89 (SOT490) plastic SMD package. NPN complements: BC846F, BC847F and BC848F series. FEATURES • Power dissipation comparable to SOT23 • Low current (max. 100 mA) • Low voltage (max. 65 V). APPLICATIONS • General purpose switching

NPN SILICON RF POWER TRANSISTOR

The RF Line NPN Silicon RF Power Transistor Designed for 24 Volt UHF large–signal, common emitter, class A linear amplifier applications in industrial and commercial equipment operating in the range of 800–960 MHz. • Specified for VCE = 24 Vdc, IC = 0.3 Adc Characteristics Output Power = 2.

Integrated Circuit Low-Noise JFET-Input Operational Amplifier

Description: The NTE857M and NTE857SM are low–noise JFET input operational amplifiers combining two state–of–the–art linear technologies on a single monolithic integrated circuit. Each internally compensated operational amplifier has well matched high voltage JFET input devices for low input of

Integrated Circuit Low-Noise JFET-Input Operational Amplifier

Description: The NTE857M and NTE857SM are low–noise JFET input operational amplifiers combining two state–of–the–art linear technologies on a single monolithic integrated circuit. Each internally compensated operational amplifier has well matched high voltage JFET input devices for low input of

Integrated Circuit Low-Noise JFET-Input Operational Amplifier

Description: The NTE857M and NTE857SM are low–noise JFET input operational amplifiers combining two state–of–the–art linear technologies on a single monolithic integrated circuit. Each internally compensated operational amplifier has well matched high voltage JFET input devices for low input of