SDI-12 Temperature Profiler

Benefits and Features Lifetime min/max temperature recording Customizable measurement spacing for any number of applications Available external probes simplify installation for roadbed applications User-resettable min/max temperature recording Automatic 1 second temperature update Make

Limited Availability Products

Thank you for your interest in Part Number: CT230Due to limited availability, please contact us for more information on this part number.

1x、2x、4x 和 8x 时钟抖动降低

时钟电路 IC CS2300 具有时钟生成器和时钟倍增/抖动降低的时钟频率合成器（清理），Cirrus Logic CS2x00 系列强势进入时钟 IC 市场。CS2x00 基于创新的混合模数锁相环，为系统设计者提供了一种无与伦比的解决方案，可解决时钟生成和倍增/抖动降低的复杂挑战。CS2x00 产品系列成员因其控制方式和/或硬件模式配置而脱颖而出。CS2300-CP 通过 I²C® / SPI™ 控制端口进行控制，并支持 CS2300 的全部功能。CS2300-OTP 通过三个模式引脚在硬件模式中进行控制。八个可选模式的功能由用户通过一次性可编程功能定义和配置。CS2x00 是一个扩展的产品 • 高性能模拟/数字锁相环\n• 时钟倍增/抖动降低• 从抖动或间歇的 50 Hz 至 30 MHz 时钟源生成 6–75 MHz 的低抖动输出时钟\n\n• 时钟生成/频率合成• 生成相对于 8–75 MHz 基准时钟的 6–75 MHz 低抖动时钟\n\n• 高精确的 PLL 倍增因子• 错误低于 1 PPM\n\n• 灵活的控制选项• 一次性可编程配置的硬件模式\n• I²C®/SPI™ 控制端口\n\n• 可配置的辅助输出• 缓冲基准时钟\n• PLL 锁指示\n• 次要 PLL 输出\n• 缓冲版本 CLK_IN\n\n• 灵活的基准时钟源• 外部振荡器或时钟源\n• 支持廉价的本地;

1x, 2x, 4x, and 8x Clock Multiplier with Internal LCO

General Description The CS2300-02 is an extremely versatile system clocking device that utilizes a programmable phase lock loop. The CS2300-02 is based on a hybrid analog-digital PLL architecture comprised of a unique combination of a Delta-Sigma Fractional-N Frequency Synthesizer and a Digital P

1x, 2x, 4x, and 8x Clock Multiplier with Internal LCO

General Description The CS2300-02 is an extremely versatile system clocking device that utilizes a programmable phase lock loop. The CS2300-02 is based on a hybrid analog-digital PLL architecture comprised of a unique combination of a Delta-Sigma Fractional-N Frequency Synthesizer and a Digital P

1x, 2x, 4x, and 8x Clock Multiplier with Internal LCO

General Description The CS2300-02 is an extremely versatile system clocking device that utilizes a programmable phase lock loop. The CS2300-02 is based on a hybrid analog-digital PLL architecture comprised of a unique combination of a Delta-Sigma Fractional-N Frequency Synthesizer and a Digital P

1x, 4x, 128x, and 256x Clock Multiplier with Internal LCO

General Description The CS2300-03 is an extremely versatile system clocking device that utilizes a programmable phase lock loop. The CS2300-03 is based on a hybrid analog-digital PLL architecture comprised of a unique combination of a Delta-Sigma Fractional-N Frequency Synthesizer and a Digital P

1x、4x、128x 和 256x 时钟抖动降低

时钟电路 IC CS2300 具有时钟生成器和时钟倍增/抖动降低的时钟频率合成器（清理），Cirrus Logic CS2x00 系列强势进入时钟 IC 市场。CS2x00 基于创新的混合模数锁相环，为系统设计者提供了一种无与伦比的解决方案，可解决时钟生成和倍增/抖动降低的复杂挑战。CS2x00 产品系列成员因其控制方式和/或硬件模式配置而脱颖而出。CS2300-CP 通过 I²C® / SPI™ 控制端口进行控制，并支持 CS2300 的全部功能。CS2300-OTP 通过三个模式引脚在硬件模式中进行控制。八个可选模式的功能由用户通过一次性可编程功能定义和配置。CS2x00 是一个扩展的产品 • 高性能模拟/数字锁相环\n• 时钟倍增/抖动降低• 从抖动或间歇的 50 Hz 至 30 MHz 时钟源生成 6–75 MHz 的低抖动输出时钟\n\n• 时钟生成/频率合成• 生成相对于 8–75 MHz 基准时钟的 6–75 MHz 低抖动时钟\n\n• 高精确的 PLL 倍增因子• 错误低于 1 PPM\n\n• 灵活的控制选项• 一次性可编程配置的硬件模式\n• I²C®/SPI™ 控制端口\n\n• 可配置的辅助输出• 缓冲基准时钟\n• PLL 锁指示\n• 次要 PLL 输出\n• 缓冲版本 CLK_IN\n\n• 灵活的基准时钟源• 外部振荡器或时钟源\n• 支持廉价的本地;

1x, 4x, 128x, and 256x Clock Multiplier with Internal LCO

General Description The CS2300-03 is an extremely versatile system clocking device that utilizes a programmable phase lock loop. The CS2300-03 is based on a hybrid analog-digital PLL architecture comprised of a unique combination of a Delta-Sigma Fractional-N Frequency Synthesizer and a Digital P

1x, 4x, 128x, and 256x Clock Multiplier with Internal LCO

General Description The CS2300-03 is an extremely versatile system clocking device that utilizes a programmable phase lock loop. The CS2300-03 is based on a hybrid analog-digital PLL architecture comprised of a unique combination of a Delta-Sigma Fractional-N Frequency Synthesizer and a Digital P

Fractional-N Clock Multiplier with Internal LCO

General Description The CS2300-CP is an extremely versatile system clocking device that utilizes a programmable phase lock loop. The CS2300-CP is based on a hybrid analog-digital PLL architecture comprised of a unique combination of a Delta-Sigma Fractional-N Frequency Synthesizer and a Digital P

Fractional-N Clock Multiplier with Internal LCO

General Description The CS2300-CP is an extremely versatile system clocking device that utilizes a programmable phase lock loop. The CS2300-CP is based on a hybrid analog-digital PLL architecture comprised of a unique combination of a Delta-Sigma Fractional-N Frequency Synthesizer and a Digital P

Fractional-N Clock Multiplier with Internal LCO

General Description The CS2300-CP is an extremely versatile system clocking device that utilizes a programmable phase lock loop. The CS2300-CP is based on a hybrid analog-digital PLL architecture comprised of a unique combination of a Delta-Sigma Fractional-N Frequency Synthesizer and a Digital P

1x, 2x, 4x, and 8x Clock Multiplier with Internal LCO

文件：92.56 Kbytes Page：3 Pages

封装/外壳：10-TFSOP，10-MSOP（0.118"，3.00mm 宽） 包装：带 描述：IC CLK MULT INTERNAL LCO 10MSOP 集成电路（IC） 时钟发生器，PLL，频率合成器

封装/外壳：10-TFSOP，10-MSOP（0.118"，3.00mm 宽） 包装：带 描述：IC CLK MULT INTERNAL LCO 10MSOP 集成电路（IC） 时钟发生器，PLL，频率合成器

Fractional-N Clock Multiplier with Internal LCO

文件：257.55 Kbytes Page：32 Pages

Fractional-N Clock Multiplier with Internal LCO

文件：257.55 Kbytes Page：32 Pages

Fractional-N Clock Multiplier with Internal LCO

文件：257.55 Kbytes Page：32 Pages

Fractional-N Clock Multiplier with Internal LCO

文件：257.55 Kbytes Page：32 Pages

Fractional-N Clock Multiplier with Internal LCO

文件：211.35 Kbytes Page：26 Pages

Fractional-N Clock Multiplier with Internal LCO

文件：403.9 Kbytes Page：28 Pages

Fractional-N Clock Multiplier with Internal LCO

文件：211.35 Kbytes Page：26 Pages

Fractional-N Clock Multiplier with Internal LCO

文件：403.9 Kbytes Page：28 Pages

Fractional-N Clock Multiplier with Internal LCO

文件：211.35 Kbytes Page：26 Pages

Fractional-N Clock Multiplier with Internal LCO

文件：211.35 Kbytes Page：26 Pages

Fractional-N Clock Multiplier with Internal LCO

文件：403.9 Kbytes Page：28 Pages

P-channel enhancement mode vertical D-MOS transistor

DESCRIPTION P-channel enhancement mode vertical D-MOS transistor in a SOT223 plastic SMD package. FEATURES • Direct interface to C-MOS, TTL, etc. • High-speed switching • No secondary breakdown. APPLICATIONS • Line current interruptor in telephone sets • Relay, high speed and line transfor

Silicon Controlled Rectifier (SCR) TV Deflection Circuit

Features: • CTV 110° – CRT Horizontal Deflection • Tracer Switch

2 AMPERE SCHOTTKY BARRIER RECTIFIERS(VOLTAGE - 20 to 100 Volts CURRENT - 2.0 Amperes)

VOLTAGE 20 to 100 Volts CURRENT 2.0 Amperes FEATURES • Plastic package has Underwriters Laboratory Flammability Classification 94V-O utilizing Flame Retardant Epoxy Molding Compound. • Exceeds environmental standards of MIL-S-19500/228 • For use in low voltage,high frequency inverters

TRISILTM

DESCRIPTION The SMTPBxx series has been designedto protect telecommunication equipment against lightning and transient induced by AC power lines. FEATURES BIDIRECTIONAL CROWBAR PROTECTION. BREAKDOWNVOLTAGE RANGE: From 62 V To 270 V. HOLDING CURRENT: IH= 150 mA min REPETITIVE PE

Transistor array to drive the small motor

■ Features ● Small and lightweight ● Low power consumption ● Low-voltage drive ● With 4 elements incorporated ■ Applications ● For motor drives ● Small motor drive circuits in general