Phone Line Monitor (PLM) IC

Description The Clare CPC5710N is a selectable dual function CMOS special purpose integrated high-impedance input, fixed-gain amplifier and an internally set voltage level comparator for telephone line monitoring. The high (>40dB) common-mode rejection ratio makes the CPC5710N an excellent choice

Excellent common-mode rejection ratio (CMRR)

Description The CPC5710N is a selectable dual function CMOS special purpose integrated high-impedance input, fixed-gain amplifier and an internally set voltage level comparator for telephone line monitoring. The high (>40dB) common-mode rejection ratio makes the CPC5710N an excellent choice for s

封装/外壳：8-SOIC（0.154"，3.90mm 宽） 功能：电话线监控器（PLM） 包装：管件 描述：IC TELECOM INTERFACE 8SOIC 集成电路（IC） 电信

Phone Line Monitor (PLM) IC

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10-Bit, 20 MSPS A/D Converter

Description The HI5710A is a low power, 10-bit, CMOS analog-to-digital converter. The use of a 2-step architecture realizes low power consumption, 150mW, and a maximum conversion speed of 20MHz with only a 3 clock cycle data latency. The HI5710A can be powered down, disabling the chip and the dig

10-Bit, 20 MSPS A/D Converter

Description The HI5710A is a low power, 10-bit, CMOS analog-to-digital converter. The use of a 2-step architecture realizes low power consumption, 150mW, and a maximum conversion speed of 20MHz with only a 3 clock cycle data latency. The HI5710A can be powered down, disabling the chip and the dig

Powerblock Modules

Description: NTE series powerblock modules come in an industry standard package, offering four circuits that can be used singly or as power control building blocks. All models feature highly efficient thermal manage ment for greatly extended cycle life. Features: Industry Standard Pack

AM/FM radio receiver circuit

文件：229.77 Kbytes Page：25 Pages

AM/FM radio receiver circuit

文件：229.77 Kbytes Page：25 Pages