FRAME ENGINE AND DATA LINK MANAGER 32P672

DESCRIPTION The PM7380 FREEDM-32P672 Frame Engine and Datalink Manager device is a monolithic integrated circuit that implements HDLC processing, and PCI Bus memory management functions for a maximum of 672 bi-directional channels. The FREEDM-32P672 may be configured to support H-MVIP, channelis

FRAME ENGINE AND DATA LINK MANAGER 32P672

DESCRIPTION The PM7380 FREEDM-32P672 Frame Engine and Datalink Manager device is a monolithic integrated circuit that implements HDLC processing, and PCI Bus memory management functions for a maximum of 672 bi-directional channels. The FREEDM-32P672 may be configured to support H-MVIP, channelis

Error correction and host interface IC for CD-ROM ELM

GENERAL DESCRIPTION The SAA7380 decoder is a block decoder buffer manager for high-speed CD-ROM applications that integrates real-time error correction and detection and host interface data transfer functions into a single chip. FEATURES • CD-ROM (Mode 1) and CD-I (Mode 2 - Form 1 and Form 2) f

Error correction and host interface IC for CD-ROM ELM

GENERAL DESCRIPTION The SAA7380 decoder is a block decoder buffer manager for high-speed CD-ROM applications that integrates real-time error correction and detection and host interface data transfer functions into a single chip. FEATURES • CD-ROM (Mode 1) and CD-I (Mode 2 - Form 1 and Form 2) f

Frame Engine and Data Link Manager

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