1.8-V PHASE LOCK LOOP CLOCK DRIVER

FEATURES · 1.8-V Phase Lock Loop Clock Driver for Double Data Rate (DDR II) Applications · Spread Spectrum Clock Compatible · Operating Frequency: 10 MHz to 400 MHz · Low Current Consumption:

1.8-V PHASE LOCK LOOP CLOCK DRIVER

文件：945.5 Kbytes Page：23 Pages

1.8-V PHASE LOCK LOOP CLOCK DRIVER

文件：945.5 Kbytes Page：23 Pages

1.8-V PHASE LOCK LOOP CLOCK DRIVER

文件：1.18367 Mbytes Page：23 Pages

1.8-V PHASE LOCK LOOP CLOCK DRIVER

文件：1.08648 Mbytes Page：23 Pages

1.8-V PHASE LOCK LOOP CLOCK DRIVER

FEATURES · 1.8-V Phase Lock Loop Clock Driver for Double Data Rate (DDR II) Applications · Spread Spectrum Clock Compatible · Operating Frequency: 10 MHz to 400 MHz · Low Current Consumption:

封装/外壳：40-VFQFN 裸露焊盘 包装：卷带（TR） 描述：IC PLL CLOCK DRIVER 1.8V 40-QFN 集成电路（IC） 应用特定时钟/定时

1.8-V PHASE LOCK LOOP CLOCK DRIVER

文件：1.18367 Mbytes Page：23 Pages

1.8-V PHASE LOCK LOOP CLOCK DRIVER

文件：1.1665 Mbytes Page：24 Pages

1.8-V PHASE LOCK LOOP CLOCK DRIVER

文件：1.1665 Mbytes Page：24 Pages

封装/外壳：40-VFQFN 裸露焊盘 包装：管件 描述：IC PLL CLOCK DRIVER 1.8V 40-QFN 集成电路（IC） 应用特定时钟/定时

Precision Optically Isolated Digital Voltage Sensor

Features  Superior optical isolation and insulation  10-MHz internal clock  1-bit, second-order sigma-delta modulator  16 bits resolution no missing codes (10 bits ENOB)  76 dB typical SNR, 66 dB typical SNDR  ±10 mV maximum offset error at room temperature  8 μV/°C typical offset dr

NPN Silicon Darlington Transistors (High current gain Low collector-emitter saturation voltage

● High current gain ● Low collector-emitter saturation voltage ● Complementary types: BC 876, BC 878 BC 880 (PNP)

NYLON THRU-HOLE SPACER

文件：186.13 Kbytes Page：1 Pages

Axial Lead & Cartridge Fuses

文件：185.59 Kbytes Page：3 Pages

Motor speed and phase control

文件：375.7 Kbytes Page：3 Pages