CDCM7005-SP 3.3-V High Performance Rad-Tolerant Class V, Clock Synchronizer and Jitter Cleaner

1 Features 1• High Performance LVPECL and LVCMOS PLL Clock Synchronizer • Two Reference Clock Inputs (Primary and Secondary Clock) for Redundancy Support With Manual or Automatic Selection • Accepts LVCMOS Input Frequencies Up to 200 MHz • VCXO_IN Clock is Synchronized to One of the Two R

封装/外壳：52-CFlatPack 包装：卷带（TR） 描述：IC CLK SYNC JITTER CLNR 集成电路（IC） 时钟发生器，PLL，频率合成器

CDCM7005-SP 3.3-V High Performance Rad-Tolerant Class V, Clock Synchronizer and Jitter Cleaner

文件：1.78333 Mbytes Page：49 Pages

ACT7005/7006 Single Package Solution Dual Transceiver, Protocol, Subsystem

General Description The ACT7005/6 Series provides a complete one package interface between the MIL-STD-1553 bus and all microprocessor systems. The hybrid provides all data buffers and control registers to function as a Bus Controller or Remote Terminal. Control of the hybrid by the subsystem i

Common Mode EMI Chokes

Special Features • Dual winding • Low radiation • High current capacity • High inductance • Dielectric strength 1000Vrms • Mounted on VW-1 rated header • Fixed pins for easy PCB insertion • Operating temperature -55 to +105°C

This product is suitable for various kinds of electronic machines to work for over current protection.

文件：673.65 Kbytes Page：5 Pages

toggle switches

文件：79.37 Kbytes Page：1 Pages

toggle switches

文件：79.37 Kbytes Page：1 Pages