CDCM1802 Clock Buffer With Programmable Divider, LVPECL I/O Additional LVCMOS Output

1 Features 1• Distributes One Differential Clock Input to One LVPECL Differential Clock Output and One LVCMOS Single-Ended Output • Programmable Output Divider for Both LVPECL and LVCMOS Outputs • 1.6-ns Output Skew Between LVCMOS and LVPECL Transitions Minimizing Noise • 3.3-V Power Suppl

具有可编程分频器的时钟缓冲器，LVPECL I/O 和 LVCMOS 输出

The CDCM1802 clock driver distributes one pair of differential clock input to one LVPECL differential clock output pair, Y0 and Y0, and one single-ended LVCMOS output, Y1. It is specifically designed for driving 50-Ω transmission lines. The LVCMOS output is delayed by 1.6 ns over the PECL output sta • Distributes One Differential Clock Input to One LVPECL Differential Clock Output and One LVCMOS Single-Ended Output\n• 1.6-ns Output Skew Between LVCMOS and LVPECL Transitions Minimizing Noise\n• Signaling Rate Up to 800-MHz LVPECL and 200-MHz LVCMOS\n• Receiver Input Threshold ±75 mV\n• 16-Pin V;

CLOCK BUFFER WITH PROGRAMMABLE DIVIDER, LVPECL I/O ADDITIONAL LVCMOS OUTPUT

文件：695.86 Kbytes Page：22 Pages

CDCM1802 Clock Buffer With Programmable Divider, LVPECL I/O Additional LVCMOS Output

文件：1.42326 Mbytes Page：30 Pages

丝印代码：AJW；CDCM1802 Clock Buffer With Programmable Divider, LVPECL I/O Additional LVCMOS Output

1 Features 1• Distributes One Differential Clock Input to One LVPECL Differential Clock Output and One LVCMOS Single-Ended Output • Programmable Output Divider for Both LVPECL and LVCMOS Outputs • 1.6-ns Output Skew Between LVCMOS and LVPECL Transitions Minimizing Noise • 3.3-V Power Suppl

丝印代码：AJW；CDCM1802 Clock Buffer With Programmable Divider, LVPECL I/O Additional LVCMOS Output

1 Features 1• Distributes One Differential Clock Input to One LVPECL Differential Clock Output and One LVCMOS Single-Ended Output • Programmable Output Divider for Both LVPECL and LVCMOS Outputs • 1.6-ns Output Skew Between LVCMOS and LVPECL Transitions Minimizing Noise • 3.3-V Power Suppl

丝印代码：AJW；CDCM1802 Clock Buffer With Programmable Divider, LVPECL I/O Additional LVCMOS Output

1 Features 1• Distributes One Differential Clock Input to One LVPECL Differential Clock Output and One LVCMOS Single-Ended Output • Programmable Output Divider for Both LVPECL and LVCMOS Outputs • 1.6-ns Output Skew Between LVCMOS and LVPECL Transitions Minimizing Noise • 3.3-V Power Suppl

丝印代码：AJW；CDCM1802 Clock Buffer With Programmable Divider, LVPECL I/O Additional LVCMOS Output

1 Features 1• Distributes One Differential Clock Input to One LVPECL Differential Clock Output and One LVCMOS Single-Ended Output • Programmable Output Divider for Both LVPECL and LVCMOS Outputs • 1.6-ns Output Skew Between LVCMOS and LVPECL Transitions Minimizing Noise • 3.3-V Power Suppl

丝印代码：AJW；CDCM1802 Clock Buffer With Programmable Divider, LVPECL I/O Additional LVCMOS Output

1 Features 1• Distributes One Differential Clock Input to One LVPECL Differential Clock Output and One LVCMOS Single-Ended Output • Programmable Output Divider for Both LVPECL and LVCMOS Outputs • 1.6-ns Output Skew Between LVCMOS and LVPECL Transitions Minimizing Noise • 3.3-V Power Suppl

CDCM1802 Clock Buffer With Programmable Divider, LVPECL I/O Additional LVCMOS Output

文件：1.42326 Mbytes Page：30 Pages

CLOCK BUFFER WITH PROGRAMMABLE DIVIDER, LVPECL I/O ADDITIONAL LVCMOS OUTPUT

文件：695.86 Kbytes Page：22 Pages

CDCM1802 Clock Buffer With Programmable Divider, LVPECL I/O Additional LVCMOS Output

文件：1.42326 Mbytes Page：30 Pages

CDCM1802 Clock Buffer With Programmable Divider, LVPECL I/O Additional LVCMOS Output

文件：1.42326 Mbytes Page：30 Pages

封装/外壳：16-VFQFN 裸露焊盘 包装：卷带（TR） 描述：IC CLK BUFFER 1:2 800MHZ 16QFN 集成电路（IC） 时钟缓冲器，驱动器

CDCM1802 Clock Buffer With Programmable Divider, LVPECL I/O Additional LVCMOS Output

文件：1.42326 Mbytes Page：30 Pages

封装/外壳：16-VFQFN 裸露焊盘 包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 描述：IC CLK BUFFER 1:2 800MHZ 16QFN 集成电路（IC） 时钟缓冲器，驱动器

CLOCK BUFFER WITH PROGRAMMABLE DIVIDER, LVPECL I/O ADDITIONAL LVCMOS OUTPUT

文件：695.86 Kbytes Page：22 Pages

CDCM1802 Clock Buffer With Programmable Divider, LVPECL I/O Additional LVCMOS Output

文件：1.42326 Mbytes Page：30 Pages

Thyratrons

Description Thyratrons are fast acting high voltage switches suitable for a variety of applications including radar, laser and scientific use. PerkinElmer’s thyratrons are constructed of ceramic and metal for strength and long life. Over 300 thyratron types are available from PerkinElmer. The t

PNP general purpose transistor

DESCRIPTION PNP transistor in a TO-92; SOT54 plastic package. NPN complement: ED1702. FEATURES • Low current (max. 500 mA) • Low voltage (max. 25 V). APPLICATIONS • General purpose switching and amplification.

PNP general purpose transistor

DESCRIPTION PNP transistor in a TO-92; SOT54 plastic package. NPN complement: ED1702. FEATURES • Low current (max. 500 mA) • Low voltage (max. 25 V). APPLICATIONS • General purpose switching and amplification.

Integrated Circuit Power Amplifier for Car Stereo Radio, 12W/Ch or 24W BTL

Description: The NTE1802 is an integrated class–B output amplifier in a 13–Lead SIP type package. This device contains two identical amplifiers with different input stages which can be used for stereo or bridge applications. The gain of each amplifier is fixed at 20dB. A special feature of the

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