丝印代码：CDCB803；CDCDB803 DB800ZL-Compliant 8-Output Clock Buffer for PCIe Gen 1 to Gen 6

1 Features • 8 LP-HCSL outputs with programmable integrated 85-Ω (default) or 100-Ω differential output terminations • 8 hardware output enable (OE#) controls • Additive phase jitter after PCIE Gen 6 filter: 20 fs, RMS (maximum) • Additive phase jitter after PCIE Gen 5 filter: 25 fs, RMS (

封装/外壳：48-VFQFN 裸露焊盘 包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 描述：8-OUTPUT CLOCK BUFFER FOR PCIE G 集成电路（IC） 时钟缓冲器，驱动器

丝印代码：CDCB803；CDCDB803 DB800ZL-Compliant 8-Output Clock Buffer for PCIe Gen 1 to Gen 5

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