丝印代码：4LN；CDC3RL02 Low Phase-Noise Two-Channel Clock Fan-Out Buffer

1 Features • Low Additive Noise: – –149dBc/Hz at 10kHz Offset Phase Noise – 0.37ps (RMS) Output Jitter • Limited Output Slew Rate for EMI Reduction (1ns to 5ns Rise/Fall Time for 10pF to 50pF Loads) • Adaptive Output Stage Controls Reflection • Regulated 1.8V Externally Available I/O Supply

Low Phase-Noise Two-Channel Clock Fan-Out Buffer

文件：820.58 Kbytes Page：20 Pages

封装/外壳：8-XFBGA，DSBGA 包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 描述：IC CLK BUFFER 1:2 52MHZ 8DSBGA 集成电路（IC） 时钟缓冲器，驱动器

丝印代码：4LN；CDC3RL02 Low Phase-Noise Two-Channel Clock Fan-Out Buffer

1 Features • Low Additive Noise: – –149dBc/Hz at 10kHz Offset Phase Noise – 0.37ps (RMS) Output Jitter • Limited Output Slew Rate for EMI Reduction (1ns to 5ns Rise/Fall Time for 10pF to 50pF Loads) • Adaptive Output Stage Controls Reflection • Regulated 1.8V Externally Available I/O Supply

丝印代码：4LN；CDC3RL02 Low Phase-Noise Two-Channel Clock Fan-Out Buffer

1 Features • Low Additive Noise: – –149dBc/Hz at 10kHz Offset Phase Noise – 0.37ps (RMS) Output Jitter • Limited Output Slew Rate for EMI Reduction (1ns to 5ns Rise/Fall Time for 10pF to 50pF Loads) • Adaptive Output Stage Controls Reflection • Regulated 1.8V Externally Available I/O Supply

CDC3RL02 Low Phase-Noise Two-Channel Clock Fan-Out Buffer

1 Features • Low Additive Noise: – –149dBc/Hz at 10kHz Offset Phase Noise – 0.37ps (RMS) Output Jitter • Limited Output Slew Rate for EMI Reduction (1ns to 5ns Rise/Fall Time for 10pF to 50pF Loads) • Adaptive Output Stage Controls Reflection • Regulated 1.8V Externally Available I/O Supply

LOW PHASE-NOISE TWO-CHANNEL CLOCK FAN-OUT BUFFER

文件：750.82 Kbytes Page：15 Pages