丝印代码：CDC340；1-LINE TO 8-LINE CLOCK DRIVER

Low Output Skew, Low Pulse Skew for Clock-Distribution and Clock-Generation Applications TTL-Compatible Inputs and Outputs Distributes One Clock Input to Eight Outputs Distributed VCC and Ground Pins Reduce Switching Noise High-Drive Outputs (–48-mA IOH, 48-mA IOL) State-of-the-Art EPIC-

丝印代码：CDC340；1-LINE TO 8-LINE CLOCK DRIVER

Low Output Skew, Low Pulse Skew for Clock-Distribution and Clock-Generation Applications TTL-Compatible Inputs and Outputs Distributes One Clock Input to Eight Outputs Distributed VCC and Ground Pins Reduce Switching Noise High-Drive Outputs (–48-mA IOH, 48-mA IOL) State-of-the-Art EPIC-

通过输出控制引脚实现高电平状态的 1:8 TTL 时钟驱动器

The CDC340 is a high-performance clock-driver circuit that distributes one (A) input signal to eight (Y) outputs with minimum skew for clock distribution. Through the use of the control pins (1G and 2G), the outputs can be placed in a high state regardless of the A input. The propagation delays are • Low Output Skew, Low Pulse Skew for Clock-Distribution and Clock-Generation Applications\n• TTL-Compatible Inputs and Outputs\n• Distributes One Clock Input to Eight Outputs\n• Distributed VCC and Ground Pins Reduce Switching Noise \n• High-Drive Outputs (-48-mA IOH, 48-mA IOL)\n• State-of-the-Art;

1-LINE TO 8-LINE CLOCK DRIVER

Low Output Skew, Low Pulse Skew for Clock-Distribution and Clock-Generation Applications TTL-Compatible Inputs and Outputs Distributes One Clock Input to Eight Outputs Distributed VCC and Ground Pins Reduce Switching Noise High-Drive Outputs (–48-mA IOH, 48-mA IOL) State-of-the-Art EPIC-

1-LINE TO 8-LINE CLOCK DRIVER

文件：104.45 Kbytes Page：7 Pages

1Line to 8Line Clock Driver

文件：131.62 Kbytes Page：8 Pages

1Line to 8Line Clock Driver

文件：131.62 Kbytes Page：8 Pages

1Line to 8Line Clock Driver

文件：131.62 Kbytes Page：8 Pages

1-LINE TO 8-LINE CLOCK DRIVER

文件：104.45 Kbytes Page：7 Pages

1Line to 8Line Clock Driver

文件：131.62 Kbytes Page：8 Pages

1Line to 8Line Clock Driver

文件：131.62 Kbytes Page：8 Pages

封装/外壳：20-SOIC（0.295"，7.50mm 宽） 包装：卷带（TR） 描述：IC CLK BUFFER 1:8 80MHZ 20SOIC 集成电路（IC） 时钟缓冲器，驱动器

封装/外壳：20-SOIC（0.295"，7.50mm 宽） 包装：卷带（TR） 描述：IC CLK BUFFER 1:8 80MHZ 20SOIC 集成电路（IC） 时钟缓冲器，驱动器

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