1-LINE TO 10-LINE CLOCK DRIVER WITH 3-STATE OUTPUTS

Low Output Skew, Low Pulse Skew for Clock-Distribution and Clock-Generation Applications Operates at 3.3-V VCC LVTTL-Compatible Inputs and Outputs Supports Mixed-Mode Signal Operation (5-V Input and Output Voltages With 3.3-V VCC) Distributes One Clock Input to Ten Outputs Outputs Have In

1-LINE TO 10-LINE CLOCK DRIVER WITH 3-STATE OUTPUTS

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1-LINE TO 10-LINE CLOCK DRIVER WITH 3-STATE OUTPUTS

文件：777.17 Kbytes Page：14 Pages

1-LINE TO 10-LINE CLOCK DRIVER WITH 3-STATE OUTPUTS

文件：775.12 Kbytes Page：14 Pages

封装/外壳：24-SSOP（0.209"，5.30mm 宽） 包装：管件 描述：IC CLK BUFFER 1:10 100MHZ 24SSOP 集成电路（IC） 时钟缓冲器，驱动器

1-LINE TO 10-LINE CLOCK DRIVER WITH 3-STATE OUTPUTS

Low Output Skew, Low Pulse Skew for Clock-Distribution and Clock-Generation Applications Operates at 3.3-V VCC LVTTL-Compatible Inputs and Outputs Supports Mixed-Mode Signal Operation (5-V Input and Output Voltages With 3.3-V VCC) Distributes One Clock Input to Ten Outputs Outputs Have In