High-Speed CMOS Logic Octal Inverting Transparent Latch, Three-State Outputs

Features • Common Latch-Enable Control • Common Three-State Output Enable Control • Buffered Inputs • Three-State Outputs • Bus Line Driving Capacity • Typical Propagation Delay = 13ns at VCC = 5V, CL = 15pF, TA = 25oC (Data to Output) • Fanout (Over Temperature Range) - Standard Outputs

High-Speed CMOS Logic Octal Inverting Transparent Latch, Three-State Outputs

文件：282.94 Kbytes Page：14 Pages

封装/外壳：20-DIP（0.300"，7.62mm） 包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 描述：IC OCT TRANSP LTCH INV 3ST 20DIP 集成电路（IC） 锁存器

High Speed CMOS Logic Octal Inverting Transparent Latch, Three-State Outputs

文件：50.92 Kbytes Page：9 Pages

High-Speed CMOS Logic Octal Inverting Transparent Latch, Three-State Outputs

文件：286.35 Kbytes Page：14 Pages

High-Speed CMOS Logic Octal Inverting Transparent Latch, Three-State Outputs

文件：288.18 Kbytes Page：14 Pages

High-Speed CMOS Logic Octal Inverting Transparent Latch, Three-State Outputs

Features • Common Latch-Enable Control • Common Three-State Output Enable Control • Buffered Inputs • Three-State Outputs • Bus Line Driving Capacity • Typical Propagation Delay = 13ns at VCC = 5V, CL = 15pF, TA = 25oC (Data to Output) • Fanout (Over Temperature Range) - Standard Outputs

High-Speed CMOS Logic Octal Inverting Transparent Latch, Three-State Outputs

文件：286.35 Kbytes Page：14 Pages

High-Speed CMOS Logic Octal Inverting Transparent Latch, Three-State Outputs

文件：288.18 Kbytes Page：14 Pages

High Speed CMOS Logic Octal Inverting Transparent Latch, Three-State Outputs

文件：50.92 Kbytes Page：9 Pages

High-Speed CMOS Logic Octal Inverting Transparent Latch, Three-State Outputs

Features • Common Latch-Enable Control • Common Three-State Output Enable Control • Buffered Inputs • Three-State Outputs • Bus Line Driving Capacity • Typical Propagation Delay = 13ns at VCC = 5V, CL = 15pF, TA = 25oC (Data to Output) • Fanout (Over Temperature Range) - Standard Outputs

High-Speed CMOS Logic Octal Inverting Transparent Latch, Three-State Outputs

文件：286.35 Kbytes Page：14 Pages

High-Speed CMOS Logic Octal Inverting Transparent Latch, Three-State Outputs

文件：282.94 Kbytes Page：14 Pages

High-Speed CMOS Logic Octal Inverting Transparent Latch, Three-State Outputs

文件：288.18 Kbytes Page：14 Pages

Octal D-type transparent latch; 3-state; inverting

GENERAL DESCRIPTION The 74HC/HCT533 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • 3-state inverting outputs for bus oriented applications • Common 3-state outp