High Speed CMOS Logic Quad-Bus Transceiver with Three-State Outputs

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High Speed CMOS Logic Quad-Bus Transceiver with Three-State Outputs

Quad bus transceiver; 3-state; inverting

GENERAL DESCRIPTION The 74HC/HCT242 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • Inverting 3-state outputs • 2-way asynchronous data bus communication • Outpu

Quad. Bus Transceivers (with 3-state outputs)

Description The HD74HCT242 is an inverting buffer and the HD74HCT243 is a noninverting buffer. Each device has one active high enable (GBA), and one active low enable (GAB). GBA enables the A outputs and GAB enables the B outputs. The device does not have schmitt trigger inputs. Features • LST