High-Speed CMOS Logic Quad 2-Input NAND Gate with Open Drain

Features • Buffered Inputs • Typical Propagation Delay: 8ns at VCC = 5V, CL = 15pF, TA = 25oC • Output Pull-up to 10V • Fanout (Over Temperature Range) - Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads - Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads • Wide Opera

CDx4HCT03 Quadruple 2-Input NAND Gates with Open-Drain Outputs

1 Features • LSTTL input logic compatible – VIL(max) = 0.8 V, VIH(min) = 2 V • CMOS input logic compatible – II ≤ 1 μA at VOL, VOH • Buffered inputs • 4.5 V to 5.5 V operation • Wide operating temperature range: -55°C to +125°C • Supports fanout up to 10 LSTTL loads • Significant power r

封装/外壳：14-SOIC（0.154"，3.90mm 宽） 包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 描述：IC GATE NAND OD 4CH 2-INP 14SOIC 集成电路（IC） 门和反相器

High Speed CMOS Logic Quad 2-Input NAND Gate with Open Drain

文件：46.26 Kbytes Page：6 Pages

High-Speed CMOS Logic Quad 2-Input NAND Gate with Open Drain

文件：258.2 Kbytes Page：9 Pages

High-Speed CMOS Logic Quad 2-Input NAND Gate with Open Drain

文件：415.05 Kbytes Page：13 Pages

High-Speed CMOS Logic Quad 2-Input NAND Gate with Open Drain

文件：444.68 Kbytes Page：13 Pages

CDx4HCT03 Quadruple 2-Input NAND Gates with Open-Drain Outputs

1 Features • LSTTL input logic compatible – VIL(max) = 0.8 V, VIH(min) = 2 V • CMOS input logic compatible – II ≤ 1 μA at VOL, VOH • Buffered inputs • 4.5 V to 5.5 V operation • Wide operating temperature range: -55°C to +125°C • Supports fanout up to 10 LSTTL loads • Significant power r

High-Speed CMOS Logic Quad 2-Input NAND Gate with Open Drain

Features • Buffered Inputs • Typical Propagation Delay: 8ns at VCC = 5V, CL = 15pF, TA = 25oC • Output Pull-up to 10V • Fanout (Over Temperature Range) - Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads - Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads • Wide Opera

High-Speed CMOS Logic Quad 2-Input NAND Gate with Open Drain

Features • Buffered Inputs • Typical Propagation Delay: 8ns at VCC = 5V, CL = 15pF, TA = 25oC • Output Pull-up to 10V • Fanout (Over Temperature Range) - Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads - Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads • Wide Opera

CDx4HCT03 Quadruple 2-Input NAND Gates with Open-Drain Outputs

1 Features • LSTTL input logic compatible – VIL(max) = 0.8 V, VIH(min) = 2 V • CMOS input logic compatible – II ≤ 1 μA at VOL, VOH • Buffered inputs • 4.5 V to 5.5 V operation • Wide operating temperature range: -55°C to +125°C • Supports fanout up to 10 LSTTL loads • Significant power r

High-Speed CMOS Logic Quad 2-Input NAND Gate with Open Drain

Features • Buffered Inputs • Typical Propagation Delay: 8ns at VCC = 5V, CL = 15pF, TA = 25oC • Output Pull-up to 10V • Fanout (Over Temperature Range) - Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads - Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads • Wide Opera

High-Speed CMOS Logic Quad 2-Input NAND Gate with Open Drain

文件：444.68 Kbytes Page：13 Pages

High-Speed CMOS Logic Quad 2-Input NAND Gate with Open Drain

文件：258.2 Kbytes Page：9 Pages

High-Speed CMOS Logic Quad 2-Input NAND Gate with Open Drain

文件：415.05 Kbytes Page：13 Pages

High-Speed CMOS Logic Quad 2-Input NAND Gate with Open Drain

文件：415.05 Kbytes Page：13 Pages

High-Speed CMOS Logic Quad 2-Input NAND Gate with Open Drain

文件：444.68 Kbytes Page：13 Pages

High-Speed CMOS Logic Quad 2-Input NAND Gate with Open Drain

文件：444.68 Kbytes Page：13 Pages

High-Speed CMOS Logic Quad 2-Input NAND Gate with Open Drain

文件：415.05 Kbytes Page：13 Pages

High-Speed CMOS Logic Quad 2-Input NAND Gate with Open Drain

文件：415.05 Kbytes Page：13 Pages

High-Speed CMOS Logic Quad 2-Input NAND Gate with Open Drain

文件：444.68 Kbytes Page：13 Pages

High-Speed CMOS Logic Quad 2-Input NAND Gate with Open Drain

文件：415.05 Kbytes Page：13 Pages

High-Speed CMOS Logic Quad 2-Input NAND Gate with Open Drain

文件：444.68 Kbytes Page：13 Pages

封装/外壳：14-SOIC（0.154"，3.90mm 宽） 包装：管件 描述：IC GATE NAND OD 4CH 2-INP 14SOIC 集成电路（IC） 门和反相器

High-Speed CMOS Logic Quad 2-Input NAND Gate with Open Drain

文件：444.68 Kbytes Page：13 Pages

High-Speed CMOS Logic Quad 2-Input NAND Gate with Open Drain

文件：415.05 Kbytes Page：13 Pages

High-Speed CMOS Logic Quad 2-Input NAND Gate with Open Drain

文件：258.2 Kbytes Page：9 Pages

High-Speed CMOS Logic Quad 2-Input NAND Gate with Open Drain

文件：415.05 Kbytes Page：13 Pages

High-Speed CMOS Logic Quad 2-Input NAND Gate with Open Drain

文件：444.68 Kbytes Page：13 Pages

High-Speed CMOS Logic Quad 2-Input NAND Gate with Open Drain

文件：444.68 Kbytes Page：13 Pages

High-Speed CMOS Logic Quad 2-Input NAND Gate with Open Drain

文件：415.05 Kbytes Page：13 Pages

Quad 2-input NAND gate

GENERAL DESCRIPTION The 74HC/HCT03 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT03 provide the 2-input NAND function The 74HC/HCT03 have open-drain N-transistor outputs

Quad 2-input NAND gate; open-drain output

1. General description The 74HC03; 74HCT03 is a quad 2-input NAND gate with open-drain outputs. Inputs include clamp diodes that enable the use of current limiting resistors to interface inputs to voltages in excess of VCC. 2. Features and benefits • Wide supply voltage range from 2.0 V to 6.

Quad 2-input NAND gate; open-drain output

1. General description The 74HC03; 74HCT03 is a quad 2-input NAND gate with open-drain outputs. Inputs include clamp diodes that enable the use of current limiting resistors to interface inputs to voltages in excess of VCC. 2. Features and benefits • Wide supply voltage range from 2.0 V to 6.

Quad 2-input NAND gate

GENERAL DESCRIPTION The 74HC/HCT03 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT03 provide the 2-input NAND function The 74HC/HCT03 have open-drain N-transistor outputs

Quad 2-input NAND gate

GENERAL DESCRIPTION The 74HC/HCT03 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT03 provide the 2-input NAND function The 74HC/HCT03 have open-drain N-transistor outputs