High-Speed CMOS Logic Octal-Bus Transceiver/Registers, Three-State

[ /Title (CD74HC652, CD74HCT652) /Subject (High-Speed CMOS Logic Octal-Bus Transceiver/Registers, Three-State) /Author () /Keywords () /Creator () /DOCINFO pdfmark [ /PageMode /UseOutlines /DOCVIEW pdfmark Features • CD74HC652, CD74HCT652 . . . . . . . . . . . Non-Inverting • Independen

High-Speed CMOS Logic Octal-Bus Transceiver/Registers, Three-State

文件：72.94 Kbytes Page：12 Pages

High-Speed CMOS Logic Octal-Bus Transceiver/Registers, Three-State

文件：139.01 Kbytes Page：13 Pages

High-Speed CMOS Logic Octal-Bus Transceiver/Registers, Three-State

[ /Title (CD74HC652, CD74HCT652) /Subject (High-Speed CMOS Logic Octal-Bus Transceiver/Registers, Three-State) /Author () /Keywords () /Creator () /DOCINFO pdfmark [ /PageMode /UseOutlines /DOCVIEW pdfmark Features • CD74HC652, CD74HCT652 . . . . . . . . . . . Non-Inverting • Independen

High-Speed CMOS Logic Octal-Bus Transceiver/Registers, Three-State

文件：139.01 Kbytes Page：13 Pages

封装/外壳：24-DIP（0.300"，7.62mm） 包装：管件 描述：IC TXRX NON-INVERT 6V 24DIP 集成电路（IC） 缓冲器，驱动器，接收器，收发器

IC TRANSCVR NON-INVERT 6V 24DIP

High-Speed CMOS Logic Octal-Bus Transceiver/Registers, Three-State

文件：72.94 Kbytes Page：12 Pages

Octal bus transceiver/register; 3-state

DESCRIPTION The 74HC/HCT652 are high-speed SI-gate CMOS devices and are pin compatible with Low power Schottky TTL (LSTTL). They are specified in compliance with Jedec standard no. 7A. FEATURES • Multiplexed real-time and stored data • Independent register for A and B buses • Independent enab

Octal bus transceiver/register; 3-state

DESCRIPTION The 74HC/HCT652 are high-speed SI-gate CMOS devices and are pin compatible with Low power Schottky TTL (LSTTL). They are specified in compliance with Jedec standard no. 7A. FEATURES • Multiplexed real-time and stored data • Independent register for A and B buses • Independent enab

Octal bus transceiver/register; 3-state

DESCRIPTION The 74HC/HCT652 are high-speed SI-gate CMOS devices and are pin compatible with Low power Schottky TTL (LSTTL). They are specified in compliance with Jedec standard no. 7A. FEATURES • Multiplexed real-time and stored data • Independent register for A and B buses • Independent enab