CDx4HC640 CDx4HCT640 High-Speed CMOS Logic Octal Three-State Bus Transceiver, Inverting

1 Features • Buffered inputs • Three-state outputs • Applications in multiple-data-bus architecture • Fanout (over temperature range) – Standard outputs : 10 LSTTL loads – Bus driver outputs : 15 LSTTL loads • Wide operating temperature range : -55oC to 125oC • Balanced propagation delay

封装/外壳：20-DIP（0.300"，7.62mm） 包装：卷带（TR） 描述：IC TRANSCEIVER INVERT 6V 20DIP 集成电路（IC） 缓冲器，驱动器，接收器，收发器

High-Speed CMOS Logic Octal Three-State Bus Transceiver, Inverting

文件：268.93 Kbytes Page：11 Pages

High-Speed CMOS Logic Octal Three-State Bus Transceiver, Inverting

文件：275.24 Kbytes Page：12 Pages

CDx4HC640 CDx4HCT640 High-Speed CMOS Logic Octal Three-State Bus Transceiver, Inverting

1 Features • Buffered inputs • Three-state outputs • Applications in multiple-data-bus architecture • Fanout (over temperature range) – Standard outputs : 10 LSTTL loads – Bus driver outputs : 15 LSTTL loads • Wide operating temperature range : -55oC to 125oC • Balanced propagation delay

High-Speed CMOS Logic Octal Three-State Bus Transceiver, Inverting

文件：275.24 Kbytes Page：12 Pages

Octal bus transceiver; 3-state; inverting

GENERAL DESCRIPTION The 74HC/HCT640 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT640 are octal transceivers featuring inverting 3-state bus compatible outputs in both send

Octal bus transceiver; 3-state; inverting

GENERAL DESCRIPTION The 74HC/HCT640 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT640 are octal transceivers featuring inverting 3-state bus compatible outputs in both send

Octal bus transceiver; 3-state; inverting

GENERAL DESCRIPTION The 74HC/HCT640 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT640 are octal transceivers featuring inverting 3-state bus compatible outputs in both send

Octal bus transceiver; 3-state; inverting

GENERAL DESCRIPTION The 74HC/HCT640 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT640 are octal transceivers featuring inverting 3-state bus compatible outputs in both send

Octal bus transceiver; 3-state; inverting

GENERAL DESCRIPTION The 74HC/HCT640 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT640 are octal transceivers featuring inverting 3-state bus compatible outputs in both send