丝印代码：CD74HC40103E；High-Speed CMOS Logic 8-Stage Synchronous Down Counters

Features • Synchronous or Asynchronous Preset • Cascadable in Synchronous or Ripple Mode • Fanout (Over Temperature Range) - Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads - Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads • Wide Operating Temperature Range . . . -5

丝印代码：CD74HC40103E；High-Speed CMOS Logic 8-Stage Synchronous Down Counters

Features • Synchronous or Asynchronous Preset • Cascadable in Synchronous or Ripple Mode • Fanout (Over Temperature Range) - Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads - Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads • Wide Operating Temperature Range . . . -5

丝印代码：CD74HC40103E；High-Speed CMOS Logic 8-Stage Synchronous Down Counters

Features • Synchronous or Asynchronous Preset • Cascadable in Synchronous or Ripple Mode • Fanout (Over Temperature Range) - Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads - Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads • Wide Operating Temperature Range . . . -5

封装/外壳：16-DIP（0.300"，7.62mm） 包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 描述：IC 8-STAGE DOWN COUNTER 16-DIP 集成电路（IC） 计数器，除法器

High-Speed CMOS Logic 8-Stage Synchronous Down Counters

文件：158.46 Kbytes Page：12 Pages

High Speed CMOS Logic 8-Stage Synchronous Down Counters

文件：45.45 Kbytes Page：9 Pages

High-Speed CMOS Logic 8-Stage Synchronous Down Counters

文件：279.09 Kbytes Page：14 Pages

High-Speed CMOS Logic 8-Stage Synchronous Down Counters

文件：454.07 Kbytes Page：16 Pages

High-Speed CMOS Logic 8-Stage Synchronous Down Counters

文件：424.24 Kbytes Page：16 Pages

High-Speed CMOS Logic 8-Stage Synchronous Down Counters

文件：424.24 Kbytes Page：16 Pages

High-Speed CMOS Logic 8-Stage Synchronous Down Counters

文件：454.07 Kbytes Page：16 Pages

High-Speed CMOS Logic 8-Stage Synchronous Down Counters

文件：279.09 Kbytes Page：14 Pages

封装/外壳：16-DIP（0.300"，7.62mm） 包装：卷带（TR） 描述：IC 8-STAGE DOWN COUNTER 16-DIP 集成电路（IC） 计数器，除法器

8-bit synchronous binary down counter

1. General description The 74HC40103 is an 8-bit synchronous down counter. It has control inputs for enabling or disabling the clock (CP), for clearing the counter to its maximum count and for presetting the counter either synchronously or asynchronously. In normal operation, the counter is de

8-bit synchronous binary down counter

GENERAL DESCRIPTION The 74HC/HCT40103 are high-speed Si-gate CMOS devices and are pin compatible with the “40103” of the “4000B” series. They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT40103 consist each of an 8-bit synchronous down counter with a single output which

8-bit synchronous binary down counter

GENERAL DESCRIPTION The 74HC/HCT40103 are high-speed Si-gate CMOS devices and are pin compatible with the “40103” of the “4000B” series. They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT40103 consist each of an 8-bit synchronous down counter with a single output which

8-bit synchronous binary down counter

GENERAL DESCRIPTION The 74HC/HCT40103 are high-speed Si-gate CMOS devices and are pin compatible with the “40103” of the “4000B” series. They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT40103 consist each of an 8-bit synchronous down counter with a single output which

8-bit synchronous binary down counter

GENERAL DESCRIPTION The 74HC/HCT40103 are high-speed Si-gate CMOS devices and are pin compatible with the “40103” of the “4000B” series. They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT40103 consist each of an 8-bit synchronous down counter with a single output which