CDx4HC(T)273 High-Speed CMOS Logic Octal D-Type Flip-Flop with Reset

1 Features • Common clock and asynchronous controller reset • Positive edge triggering • Buffered inputs • Fanout (over temperature range) – Standard outputs: 10 LSTTL loads – Bus driver outputs: 15 LSTTL loads • Wide operating temperature range: –55℃ to 125℃ • Balanced propagation delay a

具有复位功能的高速 CMOS 逻辑八路 D 型触发器

High-Speed CMOS Logic Octal D-Type Flip-Flop with Reset

文件：295.01 Kbytes Page：7 Pages

High Speed CMOS Logic Octal D-Type Flip-Flop with Reset

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丝印代码：CD74HC273E；CDx4HC(T)273 High-Speed CMOS Logic Octal D-Type Flip-Flop with Reset

1 Features • Common clock and asynchronous controller reset • Positive edge triggering • Buffered inputs • Fanout (over temperature range) – Standard outputs: 10 LSTTL loads – Bus driver outputs: 15 LSTTL loads • Wide operating temperature range: –55℃ to 125℃ • Balanced propagation delay a

丝印代码：CD74HC273E；CDx4HC(T)273 High-Speed CMOS Logic Octal D-Type Flip-Flop with Reset

1 Features • Common clock and asynchronous controller reset • Positive edge triggering • Buffered inputs • Fanout (over temperature range) – Standard outputs: 10 LSTTL loads – Bus driver outputs: 15 LSTTL loads • Wide operating temperature range: –55℃ to 125℃ • Balanced propagation delay a

丝印代码：HC273M；CDx4HC(T)273 High-Speed CMOS Logic Octal D-Type Flip-Flop with Reset

1 Features • Common clock and asynchronous controller reset • Positive edge triggering • Buffered inputs • Fanout (over temperature range) – Standard outputs: 10 LSTTL loads – Bus driver outputs: 15 LSTTL loads • Wide operating temperature range: –55℃ to 125℃ • Balanced propagation delay a

丝印代码：HC273M；CDx4HC(T)273 High-Speed CMOS Logic Octal D-Type Flip-Flop with Reset

1 Features • Common clock and asynchronous controller reset • Positive edge triggering • Buffered inputs • Fanout (over temperature range) – Standard outputs: 10 LSTTL loads – Bus driver outputs: 15 LSTTL loads • Wide operating temperature range: –55℃ to 125℃ • Balanced propagation delay a

丝印代码：HC273M；CDx4HC(T)273 High-Speed CMOS Logic Octal D-Type Flip-Flop with Reset

1 Features • Common clock and asynchronous controller reset • Positive edge triggering • Buffered inputs • Fanout (over temperature range) – Standard outputs: 10 LSTTL loads – Bus driver outputs: 15 LSTTL loads • Wide operating temperature range: –55℃ to 125℃ • Balanced propagation delay a

丝印代码：HC273M；CDx4HC(T)273 High-Speed CMOS Logic Octal D-Type Flip-Flop with Reset

1 Features • Common clock and asynchronous controller reset • Positive edge triggering • Buffered inputs • Fanout (over temperature range) – Standard outputs: 10 LSTTL loads – Bus driver outputs: 15 LSTTL loads • Wide operating temperature range: –55℃ to 125℃ • Balanced propagation delay a

High-Speed CMOS Logic Octal D-Type Flip-Flop with Reset

文件：295.01 Kbytes Page：7 Pages

High-Speed CMOS Logic Octal D-Type Flip-Flop with Reset

文件：858.7 Kbytes Page：18 Pages

High Speed CMOS Logic Octal D-Type Flip-Flop with Reset

文件：54.99 Kbytes Page：8 Pages

High Speed CMOS Logic Octal D-Type Flip-Flop with Reset

文件：54.99 Kbytes Page：8 Pages

High-Speed CMOS Logic Octal D-Type Flip-Flop with Reset

文件：295.01 Kbytes Page：7 Pages

High-Speed CMOS Logic Octal D-Type Flip-Flop with Reset

文件：858.7 Kbytes Page：18 Pages

封装/外壳：20-SOIC（0.295"，7.50mm 宽） 功能：主复位 包装：管件 描述：IC FF D-TYPE SNGL 8BIT 20SOIC 集成电路（IC） 触发器

High-Speed CMOS Logic Octal D-Type Flip-Flop with Reset

文件：858.7 Kbytes Page：18 Pages

封装/外壳：20-SOIC（0.295"，7.50mm 宽） 功能：主复位 包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 描述：IC FF D-TYPE SNGL 8BIT 20SOIC 集成电路（IC） 触发器

High-Speed CMOS Logic Octal D-Type Flip-Flop with Reset

文件：295.01 Kbytes Page：7 Pages

High-Speed CMOS Logic Octal D-Type Flip-Flop with Reset

文件：858.7 Kbytes Page：18 Pages

High-Speed CMOS Logic Octal D-Type Flip-Flop with Reset

文件：858.7 Kbytes Page：18 Pages

High-Speed CMOS Logic Octal D-Type Flip-Flop with Reset

文件：858.7 Kbytes Page：18 Pages

High-Speed CMOS Logic Octal D-Type Flip-Flop with Reset

文件：858.7 Kbytes Page：18 Pages

High-Speed CMOS Logic Octal D-Type Flip-Flop with Reset

文件：295.01 Kbytes Page：7 Pages

Octal D-type flip-flop with reset; positive-edge trigger

1. General description The 74HC273; 74HCT273 is an octal positive-edge triggered D-type flip-flop. The device features clock (CP) and master reset (MR) inputs. The outputs Qn will assume the state of their corresponding Dn inputs that meet the set-up and hold time requirements on the LOW-to-HIG

Octal D-type flip-flop with reset; positive-edge trigger

General description The 74HC273; 74HCT273 is an octal positive-edge triggered D-type flip-flop. The device features clock (CP) and master reset (MR) inputs. The outputs Qn will assume the state of their corresponding Dn inputs that meet the set-up and hold time requirements on the LOW-to-HIGH c

Octal D Flip-Flop with Common Clock and Reset

The SL74HC273 is identical in pinout to the LS/ALS273. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LS/ALSTTL outputs. This device consists of eight D flip-flops with common Clock and Reset inputs. Each flip-flop is loaded with a low-

Octal D Flip-Flop with Common Clock and Reset

Octal D Flip-Flop with Common Clock and Reset High−Performance Silicon−Gate CMOS The MC74HC273A is identical in pinout to the LS273. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs. This device consists of eight D flip−f

Octal D-type flip-flop with reset; positive-edge trigger