具有设置和复位端的双路正边沿触发式 D 型触发器

The ’ACT74 dual positive-edge-triggered devices are D-type flip-flops.\n\n A low level at the preset (PRE)\\ or clear (CLR)\\ inputs sets or resets the outputs, regardless of the levels of the other inputs. When PRE\\ and CLR\\ are inactive (high), data at the data (D) input meeting the setup time r • Inputs Are TTL-Voltage Compatible\n• Speed of Bipolar F, AS, and S, With Significantly Reduced Power Consumption\n• Balanced Propagation Delays\n• ±24-mA Output Drive Current \n• Fanout to 15 F Devices\n \n• SCR-Latchup-Resistant CMOS Process and Circuit Design\n• Exceeds 2-kV ESD Protection Per M;

Dual D-Type Flip-Flop with Set and Reset Positive-Edge-Triggered

文件：36.2 Kbytes Page：8 Pages

DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET

文件：325.79 Kbytes Page：10 Pages

具有设置和复位功能的汽车类双路正边沿触发 D 类触发器

The CD74ACT74 dual positive-edge-triggered device is a D-type flip-flop.\n A low level at the preset (PRE) or (CLR) clear inputs sets or resets the outputs, regardless of the levels of the other inputs. When PRE and CLR are inactive (high), data at the data (D) input meeting the setup time requireme • Qualified for Automotive Applications\n• Speed of Bipolar F, AS, and S, With Significantly Reduced Power Consumption\n• ±24-mA Output Drive Current \n• SCR-Latchup-Resistant CMOS Process and Circuit Design;

DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH CLEAR AND PRESET

Qualified for Automotive Applications Inputs Are TTL-Voltage Compatible Speed of Bipolar F, AS, and S, With Significantly Reduced Power Consumption Balanced Propagation Delays ±24-mA Output Drive Current − Fanout to 15 F Devices SCR-Latchup-Resistant CMOS Process and Circuit Design desc

丝印代码：ACT74Q；DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH CLEAR AND PRESET

Qualified for Automotive Applications Inputs Are TTL-Voltage Compatible Speed of Bipolar F, AS, and S, With Significantly Reduced Power Consumption Balanced Propagation Delays ±24-mA Output Drive Current − Fanout to 15 F Devices SCR-Latchup-Resistant CMOS Process and Circuit Design desc

丝印代码：ACT74Q；DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH CLEAR AND PRESET

Qualified for Automotive Applications Inputs Are TTL-Voltage Compatible Speed of Bipolar F, AS, and S, With Significantly Reduced Power Consumption Balanced Propagation Delays ±24-mA Output Drive Current − Fanout to 15 F Devices SCR-Latchup-Resistant CMOS Process and Circuit Design desc

DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH CLEAR AND PRESET

Qualified for Automotive Applications Inputs Are TTL-Voltage Compatible Speed of Bipolar F, AS, and S, With Significantly Reduced Power Consumption Balanced Propagation Delays ±24-mA Output Drive Current − Fanout to 15 F Devices SCR-Latchup-Resistant CMOS Process and Circuit Design desc

Dual D-Type Flip-Flop with Set and Reset Positive-Edge-Triggered

文件：36.2 Kbytes Page：8 Pages

DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET

文件：325.79 Kbytes Page：10 Pages

DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS

文件：887.59 Kbytes Page：14 Pages

Dual D-Type Flip-Flop with Set and Reset Positive-Edge-Triggered

文件：36.2 Kbytes Page：8 Pages

Dual D-Type Flip-Flop with Set and Reset Positive-Edge-Triggered

文件：36.2 Kbytes Page：8 Pages

DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET

文件：325.79 Kbytes Page：10 Pages

DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS

文件：887.59 Kbytes Page：14 Pages

封装/外壳：14-SOIC（0.154"，3.90mm 宽） 功能：设置（预设）和复位 包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 描述：IC FF D-TYPE DUAL 1BIT 14SOIC 集成电路（IC） 触发器

封装/外壳：14-SOIC（0.154"，3.90mm 宽） 功能：设置（预设）和复位 包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 描述：IC FF D-TYPE DUAL 1BIT 14SOIC 集成电路（IC） 触发器

DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET

文件：325.79 Kbytes Page：10 Pages

DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS

文件：887.59 Kbytes Page：14 Pages

DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS

文件：887.59 Kbytes Page：14 Pages

DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS

文件：887.59 Kbytes Page：14 Pages

DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS

文件：887.59 Kbytes Page：14 Pages

DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH CLEAR AND PRESET

文件：174.41 Kbytes Page：9 Pages

DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH CLEAR AND PRESET

文件：174.41 Kbytes Page：9 Pages

DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH CLEAR AND PRESET

文件：174.41 Kbytes Page：9 Pages

DUAL D-TYPE FLIP FLOP WITH PRESET AND CLEAR

DESCRIPTION The 74ACT74 is an advanced high-speed CMOS DUAL D-TYPE FLIP FLOP WITH PRESET AND CLEAR fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS tecnology. A signal on the D INPUT is transferred to the Q and QOUTPUTS during the positive going transition of

DUAL D-TYPE FLIP FLOP WITH PRESET AND CLEAR

DESCRIPTION The 74ACT74 is an advanced high-speed CMOS DUAL D-TYPE FLIP FLOP WITH PRESET AND CLEAR fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS tecnology. A signal on the D INPUT is transferred to the Q and QOUTPUTS during the positive going transition of

DUAL D-TYPE FLIP FLOP WITH PRESET AND CLEAR

DESCRIPTION The 74ACT74 is an advanced high-speed CMOS DUAL D-TYPE FLIP FLOP WITH PRESET AND CLEAR fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS tecnology. A signal on the D INPUT is transferred to the Q and QOUTPUTS during the positive going transition of

DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET

文件：86.43 Kbytes Page：6 Pages