Dual D-Type Positive Edge-Triggered Flip-Flop

General Description The AC/ACT74 is a dual D-type flip-flop with Asynchronous Clear and Set inputs and complementary (Q, Q) outputs. Information at the input is transferred to the outputs on the positive edge of the clock pulse. Clock triggering occurs at a voltage level of the clock pulse and i

Dual D?뭈ype Positive Edge?뭈riggered Flip?묯lop

Dual D−Type Positive Edge−Triggered Flip−Flop The MC74AC74/74ACT74 is a dual D−type flip−flop with Asynchronous Clear and Set inputs and complementary (Q,Q) outputs. Information at the input is transferred to the outputs on the positive edge of the clock pulse. Clock triggering occurs at

Advanced CMOS TTL Input

Features Inputs directly accept TTL Outputs Directly Interface to CMOS, NMOS, and TTL Outputs Source/Sink 24 mA Asynchronous Set-Reset Capability Lower power alternative to bipolar logic Functionally compatible with bipolar 74LS74 Direct drop-in replacement for obsolete components in long

DUAL D-TYPE FLIP FLOP WITH PRESET AND CLEAR

DESCRIPTION The 74ACT74 is an advanced high-speed CMOS DUAL D-TYPE FLIP FLOP WITH PRESET AND CLEAR fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS tecnology. A signal on the D INPUT is transferred to the Q and QOUTPUTS during the positive going transition of

DUAL D-TYPE FLIP FLOP WITH PRESET AND CLEAR

Advanced CMOS TTL Input

文件：504.1 Kbytes Page：6 Pages

Dual D-Type Positive Edge-Triggered Flip-Flop

文件：111.59 Kbytes Page：10 Pages

Advanced CMOS TTL Input

Features Inputs directly accept TTL Outputs Directly Interface to CMOS, NMOS, and TTL Outputs Source/Sink 24 mA Asynchronous Set-Reset Capability Lower power alternative to bipolar logic Functionally compatible with bipolar 74LS74 Direct drop-in replacement for obsolete components in long

DUAL D-TYPE FLIP FLOP WITH PRESET AND CLEAR

DESCRIPTION The 74ACT74 is an advanced high-speed CMOS DUAL D-TYPE FLIP FLOP WITH PRESET AND CLEAR fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS tecnology. A signal on the D INPUT is transferred to the Q and QOUTPUTS during the positive going transition of

DUAL D-TYPE FLIP FLOP WITH PRESET AND CLEAR

DESCRIPTION The 74ACT74 is an advanced high-speed CMOS DUAL D-TYPE FLIP FLOP WITH PRESET AND CLEAR fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS tecnology. A signal on the D INPUT is transferred to the Q and QOUTPUTS during the positive going transition of

Dual D-Type Positive Edge-Triggered Flip-Flop

General Description The AC/ACT74 is a dual D-type flip-flop with Asynchronous Clear and Set inputs and complementary (Q, Q) outputs. Information at the input is transferred to the outputs on the positive edge of the clock pulse. Clock triggering occurs at a voltage level of the clock pulse and i

Dual D-Type Positive Edge-Triggered Flip-Flop

General Description The AC/ACT74 is a dual D-type flip-flop with Asynchronous Clear and Set inputs and complementary (Q, Q) outputs. Information at the input is transferred to the outputs on the positive edge of the clock pulse. Clock triggering occurs at a voltage level of the clock pulse and is

DUAL D-TYPE FLIP FLOP WITH PRESET AND CLEAR

DESCRIPTION The 74ACT74 is an advanced high-speed CMOS DUAL D-TYPE FLIP FLOP WITH PRESET AND CLEAR fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS tecnology. A signal on the D INPUT is transferred to the Q and QOUTPUTS during the positive going transition of

Dual D-Type Flip Flop with Preset and Clear

Features • High speed: fmax = 180 MHz (typ.) at VCC = 5 V • Low power dissipation: ICC = 4 µA (max) at Ta = 25°C • Compatible with TTL outputs: VIL = 0.8 V (max) VIH = 2.0 V (min) • Symmetrical output impedance: |IOH| = IOL = 24 mA (min)

Dual D-Type Positive Edge-Triggered Flip-Flop

General Description The AC/ACT74 is a dual D-type flip-flop with Asynchronous Clear and Set inputs and complementary (Q, Q) outputs. Information at the input is transferred to the outputs on the positive edge of the clock pulse. Clock triggering occurs at a voltage level of the clock pulse and i

Dual D-Type Positive Edge-Triggered Flip-Flop

General Description The AC/ACT74 is a dual D-type flip-flop with Asynchronous Clear and Set inputs and complementary (Q, Q) outputs. Information at the input is transferred to the outputs on the positive edge of the clock pulse. Clock triggering occurs at a voltage level of the clock pulse and is

Dual D-Type Positive Edge-Triggered Flip-Flop

General Description The AC/ACT74 is a dual D-type flip-flop with Asynchronous Clear and Set inputs and complementary (Q, Q) outputs. Information at the input is transferred to the outputs on the positive edge of the clock pulse. Clock triggering occurs at a voltage level of the clock pulse and is

Dual D-Type Positive Edge-Triggered Flip-Flop

General Description The AC/ACT74 is a dual D-type flip-flop with Asynchronous Clear and Set inputs and complementary (Q, Q) outputs. Information at the input is transferred to the outputs on the positive edge of the clock pulse. Clock triggering occurs at a voltage level of the clock pulse and i

Dual D-Type Positive Edge-Triggered Flip-Flop

General Description The AC/ACT74 is a dual D-type flip-flop with Asynchronous Clear and Set inputs and complementary (Q, Q) outputs. Information at the input is transferred to the outputs on the positive edge of the clock pulse. Clock triggering occurs at a voltage level of the clock pulse and is

Dual D-Type Positive Edge-Triggered Flip-Flop

General Description The AC/ACT74 is a dual D-type flip-flop with Asynchronous Clear and Set inputs and complementary (Q, Q) outputs. Information at the input is transferred to the outputs on the positive edge of the clock pulse. Clock triggering occurs at a voltage level of the clock pulse and is

Dual D-Type Positive Edge-Triggered Flip-Flop

General Description The AC/ACT74 is a dual D-type flip-flop with Asynchronous Clear and Set inputs and complementary (Q, Q) outputs. Information at the input is transferred to the outputs on the positive edge of the clock pulse. Clock triggering occurs at a voltage level of the clock pulse and i

Dual D-Type Positive Edge-Triggered Flip-Flop

General Description The AC/ACT74 is a dual D-type flip-flop with Asynchronous Clear and Set inputs and complementary (Q, Q) outputs. Information at the input is transferred to the outputs on the positive edge of the clock pulse. Clock triggering occurs at a voltage level of the clock pulse and is

DUAL D-TYPE FLIP FLOP WITH PRESET AND CLEAR

DESCRIPTION The 74ACT74 is an advanced high-speed CMOS DUAL D-TYPE FLIP FLOP WITH PRESET AND CLEAR fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS tecnology. A signal on the D INPUT is transferred to the Q and QOUTPUTS during the positive going transition of

Dual D-Type Positive Edge-Triggered Flip-Flop

文件：111.59 Kbytes Page：10 Pages

封装/外壳：14-TSSOP（0.173"，4.40mm 宽） 功能：设置（预设）和复位 包装：卷带（TR） 描述：IC FF D-TYPE DUAL 1BIT 14TSSOP 集成电路（IC） 触发器

IC FF D-TYPE DUAL 1BIT 14TSSOP

封装/外壳：14-SOIC（0.154"，3.90mm 宽） 功能：设置（预设）和复位 包装：卷带（TR） 描述：IC FF D-TYPE DUAL 1BIT 14SOP 集成电路（IC） 触发器

IC FF D-TYPE DUAL 1BIT 14DIP

Dual D-Type Positive Edge-Triggered Flip-Flop

文件：111.59 Kbytes Page：10 Pages

Dual D-Type Positive Edge-Triggered Flip-Flop

文件：111.59 Kbytes Page：10 Pages

Dual D-Type Positive Edge-Triggered Flip-Flop

文件：111.59 Kbytes Page：10 Pages

Dual D-Type Positive Edge-Triggered Flip-Flop

文件：111.59 Kbytes Page：10 Pages

Dual D-Type Positive Edge-Triggered Flip-Flop

文件：111.59 Kbytes Page：10 Pages

Dual D-Type Flip-Flop with Set and Reset Positive-Edge-Triggered

文件：36.2 Kbytes Page：8 Pages

DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET

文件：86.43 Kbytes Page：6 Pages