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CD74AC109E.A

丝印代码:CD74AC109E;CDx4AC109 Dual J-K Positive-Edge-Triggered Flip-flops with Clear and Preset

1 Features • AC types feature 1.5V to 5.5V operation and balanced noise immunity at 30% of the supply voltage • Speed of bipolar F, AS, and S, with significantly reduced power consumption • Balanced propagation delays • ±24mA output drive current – Fanout to 15 F devices • SCR-latchup

TI

德州仪器

Dual JK Positive Edge?뭈riggered Flip?묯lop

The MC74AC109/74ACT109 consists of two high−speed completely independent transition clocked JK flip−flops. The clocking operation is independent of rise and fall times of the clock waveform. The JK design allows operation as a D flip−flop (refer to MC74AC74/74ACT74 data sheet) by connecting the J

ONSEMI

安森美半导体

Dual JK Positive Edge?뭈riggered Flip?묯lop

The MC74AC109/74ACT109 consists of two high−speed completely independent transition clocked JK flip−flops. The clocking operation is independent of rise and fall times of the clock waveform. The JK design allows operation as a D flip−flop (refer to MC74AC74/74ACT74 data sheet) by connecting the J

ONSEMI

安森美半导体

Dual JK Positive Edge?뭈riggered Flip?묯lop

The MC74AC109/74ACT109 consists of two high−speed completely independent transition clocked JK flip−flops. The clocking operation is independent of rise and fall times of the clock waveform. The JK design allows operation as a D flip−flop (refer to MC74AC74/74ACT74 data sheet) by connecting the J

ONSEMI

安森美半导体

Dual JK Positive Edge?뭈riggered Flip?묯lop

The MC74AC109/74ACT109 consists of two high−speed completely independent transition clocked JK flip−flops. The clocking operation is independent of rise and fall times of the clock waveform. The JK design allows operation as a D flip−flop (refer to MC74AC74/74ACT74 data sheet) by connecting the J

ONSEMI

安森美半导体

Dual JK Positive Edge?뭈riggered Flip?묯lop

The MC74AC109/74ACT109 consists of two high−speed completely independent transition clocked JK flip−flops. The clocking operation is independent of rise and fall times of the clock waveform. The JK design allows operation as a D flip−flop (refer to MC74AC74/74ACT74 data sheet) by connecting the J

ONSEMI

安森美半导体

更新时间:2026-3-17 23:00:00
IC供应商 芯片型号 品牌 批号 封装 库存 备注 价格
TI
25+
SOIC-16
20948
样件支持,可原厂排单订货!
TI
25+
SOIC-16
21000
正规渠道,免费送样。支持账期,BOM一站式配齐
HAR
23+
NA
20000
全新原装假一赔十
TI
20+
SOIC
53650
TI原装主营-可开原型号增税票
TI
22+
16DIP
9000
原厂渠道,现货配单
TI
07+
SOP
2398
一级代理,专注军工、汽车、医疗、工业、新能源、电力
TI/德州仪器
24+
SOP
2455
只供应原装正品 欢迎询价
TI
23+
16-SOIC
65600
TI/
24+
SOP
5000
全新原装正品,现货销售
TI/德州仪器
25+
SOP-16
880000
明嘉莱只做原装正品现货

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