型号 功能描述 生产厂家 企业 LOGO 操作
74AC109

Dual JK Positive Edge-Triggered Flip-Flop

General Description The AC/ACT109 consists of two high-speed completely independent transition clocked JK flip-flops. The clocking operation is independent of rise and fall times of the clock waveform. The JK design allows operation as a D-Type flip-flop (refer to AC/ACT74 data sheet) by connecti

Fairchild

仙童半导体

74AC109

Dual JK Positive Edge?뭈riggered Flip?묯lop

The MC74AC109/74ACT109 consists of two high−speed completely independent transition clocked JK flip−flops. The clocking operation is independent of rise and fall times of the clock waveform. The JK design allows operation as a D flip−flop (refer to MC74AC74/74ACT74 data sheet) by connecting the J

ONSEMI

安森美半导体

74AC109

Dual JK Positive Edge−Triggered Flip−Flop

ONSEMI

安森美半导体

74AC109

Dual JK Positive Edge-Triggered Flip-Flop

文件:339.62 Kbytes Page:12 Pages

Fairchild

仙童半导体

Dual JK Positive Edge-Triggered Flip-Flop

General Description The AC/ACT109 consists of two high-speed completely independent transition clocked JK flip-flops. The clocking operation is independent of rise and fall times of the clock waveform. The JK design allows operation as a D-Type flip-flop (refer to AC/ACT74 data sheet) by connecti

Fairchild

仙童半导体

Dual JK Positive Edge-Triggered Flip-Flop

Features ■ ICC reduced by 50% ■ Outputs source/sink 24mA ■ ACT109 has TTL-compatible inputs General Description The AC/ACT109 consists of two high-speed completely independent transition clocked JK flip-flops. The clocking operation is independent of rise and fall times of the clock wav

ONSEMI

安森美半导体

Dual JK Positive Edge-Triggered Flip-Flop

General Description The AC/ACT109 consists of two high-speed completely independent transition clocked JK flip-flops. The clocking operation is independent of rise and fall times of the clock waveform. The JK design allows operation as a D-Type flip-flop (refer to AC/ACT74 data sheet) by connecti

Fairchild

仙童半导体

Dual JK Positive Edge-Triggered Flip-Flop

Features ■ ICC reduced by 50% ■ Outputs source/sink 24mA ■ ACT109 has TTL-compatible inputs General Description The AC/ACT109 consists of two high-speed completely independent transition clocked JK flip-flops. The clocking operation is independent of rise and fall times of the clock wav

ONSEMI

安森美半导体

Dual JK Positive Edge-Triggered Flip-Flop

General Description The AC/ACT109 consists of two high-speed completely independent transition clocked JK flip-flops. The clocking operation is independent of rise and fall times of the clock waveform. The JK design allows operation as a D-Type flip-flop (refer to AC/ACT74 data sheet) by connecti

Fairchild

仙童半导体

Dual JK Positive Edge-Triggered Flip-Flop

General Description The AC/ACT109 consists of two high-speed completely independent transition clocked JK flip-flops. The clocking operation is independent of rise and fall times of the clock waveform. The JK design allows operation as a D-Type flip-flop (refer to AC/ACT74 data sheet) by connecti

Fairchild

仙童半导体

Dual JK Positive Edge-Triggered Flip-Flop

Features ■ ICC reduced by 50% ■ Outputs source/sink 24mA ■ ACT109 has TTL-compatible inputs General Description The AC/ACT109 consists of two high-speed completely independent transition clocked JK flip-flops. The clocking operation is independent of rise and fall times of the clock wav

ONSEMI

安森美半导体

Dual JK Positive Edge-Triggered Flip-Flop

文件:339.62 Kbytes Page:12 Pages

Fairchild

仙童半导体

Dual JK Positive Edge-Triggered Flip-Flop

文件:339.62 Kbytes Page:12 Pages

Fairchild

仙童半导体

封装/外壳:16-TSSOP(0.173",4.40mm 宽) 功能:设置(预设)和复位 包装:管件 描述:IC FF JK TYPE DUAL 1BIT 16TSSOP 集成电路(IC) 触发器

ONSEMI

安森美半导体

封装/外壳:16-DIP(0.300",7.62mm) 功能:设置(预设)和复位 包装:袋 描述:IC FF JK TYPE DUAL 1BIT 16DIP 集成电路(IC) 触发器

ONSEMI

安森美半导体

Dual JK Positive Edge-Triggered Flip-Flop

文件:339.62 Kbytes Page:12 Pages

Fairchild

仙童半导体

Dual JK Positive Edge-Triggered Flip-Flop

文件:339.62 Kbytes Page:12 Pages

Fairchild

仙童半导体

74AC109产品属性

  • 类型

    描述

  • 型号

    74AC109

  • 制造商

    FAIRCHILD

  • 制造商全称

    Fairchild Semiconductor

  • 功能描述

    Dual JK Positive Edge-Triggered Flip-Flop

更新时间:2025-10-17 22:59:00
IC供应商 芯片型号 品牌 批号 封装 库存 备注 价格
onsemi(安森美)
24+
SO16P
940
只做原装,提供一站式配单服务,代工代料。BOM配单
FAIRCHILD/仙童
24+
NA/
1500
优势代理渠道,原装正品,可全系列订货开增值税票
FAIRCHILD/仙童
25+
TSSOP16
54648
百分百原装现货 实单必成 欢迎询价
FAIRCHILD/仙童
24+
TSSOP16
990000
明嘉莱只做原装正品现货
HAR
23+
DIP-16
6800
只做原装正品假一赔十为客户做到零风险!!
NS
95+
SOP
83
一级代理,专注军工、汽车、医疗、工业、新能源、电力
NS
97
SOP16
1926
原装现货
FAIRCHILD/仙童
24+
SOP5.2
124
大批量供应优势库存热卖
ON/安森美
18+
SOP-16
12500
全新原装正品,本司专业配单,大单小单都配
TI/德州仪器
25+
DIP16
32360
TI/德州仪器全新特价74AC109PC即刻询购立享优惠#长期有货

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