Octal D-Type Flip-Flop, Three-State Positive-Edge Triggered, Non-Inverting

Description The CD54AC574/3A and CD54ACT574/3A are octal D-type, three-state, positive-edge triggered flip-flops that utilize the Harris Advanced CMOS Logic technology. The eight flip flops enter data into their registers on the LOW-to-HIGH transition of the clock (CP). The Output Enable (OE) c

CDx4AC574, CDx4ACT574 Octal D-Type Flip-Flop, 3-State Positive-Edge-Triggered

1 Features • SCR-latchup-resistant CMOS process and circuit design • Speed of bipolar FAST*/AS/S with significantly reduced power consumption • Balanced propagation delays • AC types feature 1.5V to 5.5V operation and balanced noise immunity at 30% of the supply • ± 24mA output drive c

Octal D-Type Flip-Flop, Three-State Positive-Edge Triggered, Non-Inverting

Description\nThe CD54AC574/3A and CD54ACT574/3A are octal D-type, three-state, positive-edge triggered flip-flops that utilize the Harris Advanced CMOS Logic technology. The eight flip flops enter data into their registers on the LOW-to-HIGH transition of the clock (CP). The Output Enable (OE) contr

具有三态输出的八路 D 型同相触发器

The RCA-CD54/74AC564 and CD54/74AC574 and the CD54/74ACT564 and CD54/74ACT574 octal D-type, 3-state, positive-edge-triggered flip-flops use the RCA ADVANCED CMOS technology. The eight flip-flops enter data into their registers on the LOW-to-HIGH transition of the clock (CP). The Output Enable (OE\\) • Buffered inputs\n• Exceeds 2-kV ESD Protection - MIL-STD-883, Method 3015\n• Speed of bipolar FAST*/AS/S with significantly reduced power consumption\n• AC types feature 1.5-V to 5.5-V operation and balanced noise immunity at 30% of the supply\n• Characterized for operation from –40° to 85°C\n;

OCTAL D-TYPE FLIP-FLOPS, 3-STATE POSITIVE-EDGE-TRIGGERED

文件：246.79 Kbytes Page：8 Pages

Octal D-Type Flip-Flop, Three-State Positive-Edge Triggered, Non-Inverting

Description The CD54AC574/3A and CD54ACT574/3A are octal D-type, three-state, positive-edge triggered flip-flops that utilize the Harris Advanced CMOS Logic technology. The eight flip flops enter data into their registers on the LOW-to-HIGH transition of the clock (CP). The Output Enable (OE) c

CDx4AC574, CDx4ACT574 Octal D-Type Flip-Flop, 3-State Positive-Edge-Triggered

1 Features • SCR-latchup-resistant CMOS process and circuit design • Speed of bipolar FAST*/AS/S with significantly reduced power consumption • Balanced propagation delays • AC types feature 1.5V to 5.5V operation and balanced noise immunity at 30% of the supply • ± 24mA output drive c

CDx4AC574, CDx4ACT574 Octal D-Type Flip-Flop, 3-State Positive-Edge-Triggered

1 Features • SCR-latchup-resistant CMOS process and circuit design • Speed of bipolar FAST*/AS/S with significantly reduced power consumption • Balanced propagation delays • AC types feature 1.5V to 5.5V operation and balanced noise immunity at 30% of the supply • ± 24mA output drive c

Octal D-Type Flip-Flop, 3-State

文件：1.04646 Mbytes Page：17 Pages

Octal D-Type Flip-Flop, Three-State Positive-Edge Triggered, Non-Inverting

Octal D-Type Flip-Flop with TRI-STATE Outputs

文件：166.56 Kbytes Page：10 Pages

Octal D-Type Flip-Flop with TRI-STATE Outputs

文件：166.56 Kbytes Page：10 Pages

Octal D-Type Flip-Flop with TRI-STATE Outputs

文件：166.56 Kbytes Page：10 Pages

Octal D-Type Flip-Flop with TRI-STATE Outputs

文件：166.56 Kbytes Page：10 Pages

OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS

文件：529.08 Kbytes Page：16 Pages