CMOS 4-Bit Latch/4-to-16 Line Decoders

Description CD4514BMS and CD4515BMS consist of a 4-bit strobed latch and a 4-to-16-line decoder. The latches hold the last input data presented prior to the strobe transition from 1 to 0. Inhibit control allows all outputs to be placed at 0(CD4514BMS) or 1(CD4515BMS) regardless of the state of

CMOS 4-Bit Latch/4-to-16 Line Decoders

文件：340.8 Kbytes Page：9 Pages

Latch, 4-To-16 Line decoder, Rad-Hard, CMOS, Logic

CMOS 4-Bit Latch/4-to-16 Line Decoders

文件：340.8 Kbytes Page：9 Pages

4-BIT LATCH/4-TO-16 LINE DECODER

DESCRIPTION TheHCC4514B/HCC4515B (extended temperature range) and theHCF4514B/HCF4515B (intermediate temperature range) are monolithic integrated circuits available in 24-lead dual in-line plastic or ceramic package and plastic micro package. The HCC/HCF4514B/4515B consisting of a 4-bit strobed l

4-BIT LATCH/4-TO-16 LINE DECODER

DESCRIPTION TheHCC4514B/HCC4515B (extended temperature range) and theHCF4514B/HCF4515B (intermediate temperature range) are monolithic integrated circuits available in 24-lead dual in-line plastic or ceramic package and plastic micro package. The HCC/HCF4514B/4515B consisting of a 4-bit strobed l

1-of-16 decoder/demultiplexer with input latches

DESCRIPTION The HEF4514B is a 1-of-16 decoder/demultiplexer, having four binary weighted address inputs (A0 to A3), a latch enable input (EL), and an active LOW enable input (E). The 16 outputs (O0 to O15) are mutually exclusive active HIGH. When EL is HIGH, the selected output is determined by

1-of-16 decoder/demultiplexer with input latches

DESCRIPTION The HEF4514B is a 1-of-16 decoder/demultiplexer, having four binary weighted address inputs (A0 to A3), a latch enable input (EL), and an active LOW enable input (E). The 16 outputs (O0 to O15) are mutually exclusive active HIGH. When EL is HIGH, the selected output is determined by

1-of-16 decoder/demultiplexer with input latches

DESCRIPTION The HEF4514B is a 1-of-16 decoder/demultiplexer, having four binary weighted address inputs (A0 to A3), a latch enable input (EL), and an active LOW enable input (E). The 16 outputs (O0 to O15) are mutually exclusive active HIGH. When EL is HIGH, the selected output is determined by