丝印代码：CD4508BF3A；CMOS Dual 4-Bit Latch

Features: ® Two independent 4-bit latches ® Individual master reset for each 4-bit latch ® 3.state outputs with high-impedance state for bus line applications = Medium-speed operation: tp = tp 4 = 70 ns {typ.) at Vpp = 10 Vand C_= 50 pF ® 100% tested for quiescent current at 20 V ® 5-V

丝印代码：CD4508BF3A；CMOS Dual 4-Bit Latch

Features: ® Two independent 4-bit latches ® Individual master reset for each 4-bit latch ® 3.state outputs with high-impedance state for bus line applications = Medium-speed operation: tp = tp 4 = 70 ns {typ.) at Vpp = 10 Vand C_= 50 pF ® 100% tested for quiescent current at 20 V ® 5-V

CMOS DUAL 4-BIT LATCH

文件：228.36 Kbytes Page：14 Pages

Cmos Dual 4-Bit Latch

文件：1.02825 Mbytes Page：15 Pages

Silicon Diffused Power Transistor

GENERAL DESCRIPTION Enhanced performance, new generation, high-voltage, high-speed switching npn transistor in a plastic envelope intended for use in horizontal deflection circuits of colour television receivers and p.c monitors. Features exceptional tolerance to base drive and collector current

Silicon Diffused Power Transistor

GENERAL DESCRIPTION Enhanced performance, new generation, high-voltage, high-speed switching npn transistor with an integrated damper diode in a plastic full-pack envelope intended for use in horizontal deflection circuits of colour television receivers. Features exceptional tolerance to

Dual 4-bit latch

DESCRIPTION The HEF4508B is a dual 4-bit latch, which consists of two identical independent 4-bit latches with separate strobe (ST), master reset (MR), output-enable input (EO) and 3-state outputs (O). With the ST input in the HIGH state, the data on the D inputs appear at the corresponding outp

Dual 4-bit latch

DESCRIPTION The HEF4508B is a dual 4-bit latch, which consists of two identical independent 4-bit latches with separate strobe (ST), master reset (MR), output-enable input (EO) and 3-state outputs (O). With the ST input in the HIGH state, the data on the D inputs appear at the corresponding outp

Dual 4-bit latch

DESCRIPTION The HEF4508B is a dual 4-bit latch, which consists of two identical independent 4-bit latches with separate strobe (ST), master reset (MR), output-enable input (EO) and 3-state outputs (O). With the ST input in the HIGH state, the data on the D inputs appear at the corresponding outp

CMOS DUAL 4-BIT LATCH

Dual 4-bit latch

Dual 4-bit latch